CN100416996C - Power factor correction circuit adopting coupled induction - Google Patents
Power factor correction circuit adopting coupled induction Download PDFInfo
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- CN100416996C CN100416996C CNB2005101019275A CN200510101927A CN100416996C CN 100416996 C CN100416996 C CN 100416996C CN B2005101019275 A CNB2005101019275 A CN B2005101019275A CN 200510101927 A CN200510101927 A CN 200510101927A CN 100416996 C CN100416996 C CN 100416996C
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- 238000012937 correction Methods 0.000 title claims description 10
- 230000006698 induction Effects 0.000 title 1
- 230000008878 coupling Effects 0.000 claims abstract description 35
- 238000010168 coupling process Methods 0.000 claims abstract description 35
- 238000005859 coupling reaction Methods 0.000 claims abstract description 35
- 238000004804 winding Methods 0.000 claims abstract description 21
- 239000003990 capacitor Substances 0.000 abstract 1
- 238000013461 design Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 230000001965 increasing effect Effects 0.000 description 4
- 238000011084 recovery Methods 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 230000001939 inductive effect Effects 0.000 description 3
- 238000010521 absorption reaction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000004146 energy storage Methods 0.000 description 2
- JEIPFZHSYJVQDO-UHFFFAOYSA-N ferric oxide Chemical compound O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
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- 238000011161 development Methods 0.000 description 1
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- 230000002349 favourable effect Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000005764 inhibitory process Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/30—Reactive power compensation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P80/00—Climate change mitigation technologies for sector-wide applications
- Y02P80/10—Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier
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Abstract
The circuit for correcting power factor includes following structure: the input of the DC voltage is connected to one end of first coupling inductance; synonymous end of the first coupling inductance is connected to anodes of first diode and second diode, as well as drain pole of a main switch tube; synonymous end of a second coupling inductance winding is connected to one end of a resonant inductance; cathode of second diode is connected to anode of fourth diode, and not synonymous end of the second coupling inductance winding; the other end of the resonant inductance is connected to cathode of first diode, anode of third diode, and one end of first capacitor. Voltage stress of all parts will not exceed PFC output voltage. Since current stress is small, the disclosed circuit possesses high reliability.
Description
Technical field
The present invention relates to a kind of circuit arrangement, in particular a kind of power factor correction of adopting the coupling inductance technology, the i.e. improvement of pfc circuit device.
Background technology
Since EMC electromagnetic compatibility market pressure permit standard was carried out in Europe in January, 1996, countries in the world were more and more paid attention to the Electromagnetic Compatibility of Power Electronics problem, also comprise the content of electromagnetic compatibility in our the country-driven CCC standard.European standard for communication class electronic equipment main reference is EN55022, also to follow the current reflection harmonic wave for input current less than the equipment of 16A and suppress EN61000-3-2, the electromagnetic compatibility standard of various countries may be different, all be based on IEC and CISPR relevant criterion fortunately, above-mentioned standard has mainly been quoted CISPR 22 and IEC1000-3-2, wherein A level limit value is primarily aimed at commercial and industrial purposes equipment, and B level limit value is primarily aimed at civil equipment.
Along with increasing product is sold to abroad, very high for overcoming market barrier to the electromagnetic compatibility requirement of equipment, require B level limit value usually.This just requires power consumption equipment must consider the PFC technology, could satisfy the requirement of IEC 1000-3-2.
The topological structure of using based on PFC still is the BOOST circuit mainly at present, and relevant technical patent is a lot, generally mainly is divided into passive and active two classes.Adopt active mode can realize high efficiency in the relative broad range, passive advantage then is higher reliability.Consider the volumetric spaces and the high power density of modular power source, the soft switch technique that really is fit to module application is actually rare, because all there is device in existing a lot of technology and inhales the too much problem of resonant network, is not suitable for using in very little space.
ASTEC has adopted its patent U.S. Patent number in its topping power factor correcting module be US6084790, and the characteristics of this patent are that the mode that adopts inductance or coupling inductance to seal in each parallel branch realizes dividing equally of electric current and loss, as shown in Figure 1.But be this dividing equally with good conditionsi, must guarantee that each parallel branch impedance is consistent or approximate, this need guarantee on making, and to accomplish that this point is the comparison difficulty, inductance L (1)～such magnetic device of L (N) particularly, as adopting coupling inductance, the umber of turn of each branch road must be strict identical, otherwise just can not realize dividing equally of electric current, even can bring serious imbalance.In addition, being responsible for FET (1)～FET (N) is hard switching, and there is the short circuit reverse recovery current in diode D (1)～D (N), has also increased the loss of being responsible for and has also reduced reliability simultaneously.
Therefore, there is defective in prior art, awaits improving and development.
Summary of the invention
The objective of the invention is to propose a kind of modular power source confined space that is suitable for, be convenient to make the pfc circuit of realization, it has, and required device is few, and the electric stress of device is little, the reliability advantages of higher.
Technical scheme of the present invention comprises:
A kind of circuit of power factor correction that adopts coupling inductance, wherein, the direct voltage anode is connected to the non-same polarity of the first coupling inductance winding, and the end of the same name of this first coupling inductance winding connects the anode of one first diode and second diode, and the drain electrode of main switch;
The end of the same name of the second coupling inductance winding is connected to an end of resonant inductance;
The negative electrode of described second diode connects the anode of the 4th diode, links to each other with the non-same polarity of the second coupling inductance winding simultaneously;
The other end of described resonant inductance links to each other with the negative electrode of described first diode, the anode of the 3rd diode, an end of first electric capacity;
The negative electrode of the other end of this first electric capacity and described the 3rd diode and the 4th diode, and an end of second electric capacity links to each other;
The other end of described second electric capacity and the source electrode of described main switch link to each other with the negative terminal of direct voltage simultaneously;
The grid of described main switch connects control signal.
Described circuit, wherein, the number of turn of the described first coupling inductance winding is greater than the number of turn of the described second coupling inductance winding.
Described circuit, wherein, described main switch is the MOSFET pipe, or insulated gate bipolar transistor.
Described circuit, wherein, described direct voltage is for obtaining ac input end through behind the rectifier bridge.
Described circuit, wherein, described rectifier bridge is a full-wave rectification bridge.
A kind of circuit of power factor correction that adopts coupling inductance provided by the present invention, compared with prior art, because the voltage stress of all devices can not surpass the PFC output voltage, current stress is less, therefore has very high reliability; Effectively suppress diode reverse recovery current, thereby suppressed the interference of DI/DT, helped the EMC design; Stability is high, and produces easier realization.
Description of drawings
Fig. 1 is the schematic diagram of the circuit of power factor correction of prior art;
Fig. 2 is a kind of schematic diagram that adopts the coupling inductance pfc circuit of the present invention;
Fig. 3 is the patent work sequential chart of pfc circuit of the present invention.
Embodiment
To be described in further detail preferred embodiment of the present invention below in conjunction with accompanying drawing, indication circuit of the present invention is not limited to be applied to pfc circuit:
In the circuit of power factor correction of employing coupling inductance of the present invention, as shown in Figure 2, AC holds input exchange signal, through obtaining direct voltage Vin after rectifier bridge VD1, VD2, VD3, the VD4 full-wave rectification, the Vin conduct is the input voltage of frame of broken lines indication circuit of the present invention as shown in Figure 2, VT1 is a main switch among Fig. 2, is not limited to MOSFET, also can be switch power control devices such as insulated gate bipolar transistor IGBT; C1～C2 is that first and second electric capacity, VD5～VD8 are first to fourth diode, and L1 is a coupling inductance, and the number of turn of the first coupling inductance winding L 1:A and the second coupling inductance winding L 1:B is respectively n1 and n2, can make n1＞n2 in the design, to make things convenient for coiling.The input of Vin just is being connected to an end of L1:A winding, and the end of the same name of L1:A winding connects the anode of VD5, VD6, the drain electrode of main switch VT1; The end of the same name of L1:B winding connects the end of resonant inductance LS.The negative electrode of VD6 connects the anode of VD8, links to each other with the non-same polarity of L1:B winding simultaneously.The other end of resonant inductance LS links to each other with the anode of the negative electrode of VD5, VD7, the end of C1.The negative electrode of the other end of C1 and VD7, VD8, the end of C2 links to each other.The other end of C2 and the source electrode of main switch, the negative with input Vin connects simultaneously, and the grid of main switch connects control signal.
Circuit of the present invention is not limited to use in circuit of power factor correction, and when the input DC source, described rectifier bridge part can be omitted, and therefore can also apply to DC-DC voltage boosting converter, realizes boosting inverter efficiently.
L1 is a coupling inductance in Fig. 2, and the number of turn n1 of L1:A can be designed to the number of turn n2 much larger than L1:B, and promptly coupling inductance winding n2 does not need to take too many coiling window area; LS is additional resonant inductance; C1 is a resonant capacitance; If coupling inductance L1 is operated in the CCM pattern, in the t0 moment, main power tube VT1 is a conducting state, the conducting electric current that the electric current I of inductance equals to be responsible for; I1 and I2 are zero; The voltage of resonant capacitance C1 is Uc=Vin*n2/n1; T1 is responsible for constantly and drives the DRV shutoff:
The working timing figure of circuit of the present invention is seen shown in Figure 3,
(t1～t2) t1 is responsible for constantly to drive and turn-offs, inductive current I=I1+I2, the I2=0 that exists owing to resonant inductance LS, t1 is the electric current I 1=I of VD5 constantly, under the effect of coupling inductance L1:B, by the increase of starting from scratch of the electric current I 2 of LS, the energy of resonant capacitance C1 is discharged into output (the harmless absorption), has suppressed to be responsible for the voltage speed of VDS to a certain extent.Up to t2 moment I2=I, the electric current I 1=0 of VD5 turn-offs naturally.
(t2～t3) along with the release of inductance L 1 energy storage, inductive current I=I2 constantly descends, and up to t3 constantly, the driving of being responsible for VT1 is open-minded
(after t3～t4) the t3 moment, VT1 opened, its conducting electric current was zero (being zero current turning-on), because I=I2, inductive current can not suddenly change.Electric current by VD6 and VD7 is I2, because the existence of resonant inductance, can be not reverse at once.Up to t4 moment I2=0, VD6 realizes that nature turn-offs, and Δ t is during this period of time:
(t4 of t4～t5) is constantly after the current reversal zero passage of LS, the VD8 conducting, and LS and C1 resonance, portion of energy is discharged into output.Up to t5 constantly, the LS electric current is zero, and energy discharges fully.VD8 realizes that nature turn-offs.
(t5～t6) resonant capacitance voltage finally is stabilized to Uc=Vin*n2/n1, and the electric current of boost inductance L1 constantly rises, and energy storage constantly increases, and up to t6 constantly, it is maximum that I reaches, and is responsible for to drive and turn-offs, and repeats t1 state constantly.
The circuit of power factor correction of employing coupling inductance of the present invention has adopted the coupling inductance structure, and easier realization on producing has realized turn-offing naturally of diode simultaneously, and the person in charge's zero current turning-on has improved circuit reliability.
Circuit of the present invention is usually used in the EMC Design, and preposition AC-DC part is finished input current phase compensation, harmonic wave inhibition.Also can reach simultaneously the purpose that improves efficiency and power supply quality.
Adopt circuit of the present invention, compared with prior art, its advantage applies exists:
Because the voltage stress of all devices can not surpass the PFC output voltage, current stress is less, therefore has very high reliability.
Because all diodes are realized nature and are turn-offed, and have effectively suppressed diode reverse recovery current, thereby have suppressed the interference of DI/DT, help the EMC design.
Because the additional umber of turn of coupling inductance seldom, is convenient to coiling, reduce the influence of parasitic parameter simultaneously simultaneously.Added resonant inductance does not need very big, and the device that is increased simultaneously only is three clamping diodes and a clamping capacitance, does not need extra RCD to absorb.Be convenient in modular power source, use.
Diode in the circuit of the present invention has been realized natural shutoff, has eliminated reverse recovery current, is responsible for simultaneously and has realized zero current turning-on, has fully reduced the turn-on consumption of being responsible for.Though increased a diode losses in the conducting loop, test shows, little to total effectiveness affects.When described resonant capacitance is realized harmless the absorption, suppressed to be responsible for the DV/DT when turn-offing to a certain extent, reduced when being responsible for turn-off power loss favourable the design of EMC.Circuit arrangement of the present invention easier realization on producing.
Should be understood that above-mentioned description at specific embodiment is comparatively detailed, can not therefore think the restriction to scope of patent protection of the present invention, scope of patent protection of the present invention should be as the criterion with claims.
Claims (5)
1. circuit of power factor correction that adopts coupling inductance, it is characterized in that, the anode of direct voltage is connected to the non-same polarity of the first coupling inductance winding, and the end of the same name of this first coupling inductance winding connects the anode of first diode and second diode and the drain electrode of main switch;
The end of the same name of the second coupling inductance winding is connected to an end of resonant inductance;
The negative electrode of described second diode connects the anode of the 4th diode, links to each other with the non-same polarity of the second coupling inductance winding simultaneously;
The other end of described resonant inductance links to each other with the negative electrode of described first diode, the anode of the 3rd diode, an end of first electric capacity;
The negative electrode of the other end of this first electric capacity and described the 3rd diode and the 4th diode, and an end of second electric capacity links to each other;
The other end of described second electric capacity and the source electrode of described main switch link to each other with the negative terminal of direct voltage simultaneously;
The grid of described main switch connects control signal.
2. circuit according to claim 1 is characterized in that the number of turn of the described first coupling inductance winding is greater than the number of turn of the described second coupling inductance winding.
3. circuit according to claim 1 is characterized in that, described main switch is MOSFET pipe or insulated gate bipolar transistor.
4. circuit according to claim 1 is characterized in that, described direct voltage is for obtaining ac input end through behind the rectifier bridge.
5. circuit according to claim 4 is characterized in that, described rectifier bridge is a full-wave rectification bridge.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005101019275A CN100416996C (en) | 2005-12-02 | 2005-12-02 | Power factor correction circuit adopting coupled induction |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005101019275A CN100416996C (en) | 2005-12-02 | 2005-12-02 | Power factor correction circuit adopting coupled induction |
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| Publication Number | Publication Date |
|---|---|
| CN1980028A CN1980028A (en) | 2007-06-13 |
| CN100416996C true CN100416996C (en) | 2008-09-03 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB2005101019275A Expired - Fee Related CN100416996C (en) | 2005-12-02 | 2005-12-02 | Power factor correction circuit adopting coupled induction |
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Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102347696B (en) * | 2010-07-29 | 2013-11-06 | 深圳Tcl新技术有限公司 | Switch power supply |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4384321A (en) * | 1980-04-29 | 1983-05-17 | California Institute Of Technology | Unity power factor switching regulator |
| US5457379A (en) * | 1993-10-15 | 1995-10-10 | At&T Ipm Corp. | High efficiency switch mode regulator |
| US5815386A (en) * | 1997-06-19 | 1998-09-29 | Factor One, Inc. | Snubber for zero current switched networks |
| JP2001119934A (en) * | 1999-10-19 | 2001-04-27 | Yokogawa Electric Corp | Switching power supply |
| JP2001157447A (en) * | 1999-11-12 | 2001-06-08 | Kimigafuchi Gakuen | Double-resonance forward-type converter |
| DE102004022136A1 (en) * | 2003-05-23 | 2004-12-16 | Delta Electronics Inc. | Soft-switch power converter e.g. with soft-switch boost circuit, includes rectifier coupled to storage inductor and active snubber to transfer energy to output terminal |
-
2005
- 2005-12-02 CN CNB2005101019275A patent/CN100416996C/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4384321A (en) * | 1980-04-29 | 1983-05-17 | California Institute Of Technology | Unity power factor switching regulator |
| US5457379A (en) * | 1993-10-15 | 1995-10-10 | At&T Ipm Corp. | High efficiency switch mode regulator |
| US5815386A (en) * | 1997-06-19 | 1998-09-29 | Factor One, Inc. | Snubber for zero current switched networks |
| JP2001119934A (en) * | 1999-10-19 | 2001-04-27 | Yokogawa Electric Corp | Switching power supply |
| JP2001157447A (en) * | 1999-11-12 | 2001-06-08 | Kimigafuchi Gakuen | Double-resonance forward-type converter |
| DE102004022136A1 (en) * | 2003-05-23 | 2004-12-16 | Delta Electronics Inc. | Soft-switch power converter e.g. with soft-switch boost circuit, includes rectifier coupled to storage inductor and active snubber to transfer energy to output terminal |
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| Publication number | Publication date |
|---|---|
| CN1980028A (en) | 2007-06-13 |
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Granted publication date: 20080903 Termination date: 20171202 |