CN109728085B

CN109728085B - Reverse conducting type insulated gate bipolar transistor

Info

Publication number: CN109728085B
Application number: CN201811640606.6A
Authority: CN
Inventors: 单建安; 冯浩; 袁嵩
Original assignee: Anjian Technology Shenzhen Co ltd
Current assignee: Anjian Technology (Shenzhen) Co.,Ltd.
Priority date: 2018-12-29
Filing date: 2018-12-29
Publication date: 2021-10-22
Anticipated expiration: 2038-12-29
Also published as: CN109728085A

Abstract

The invention discloses a reverse conducting type insulated gate bipolar transistor, relates to a power semiconductor device, and provides a design scheme aiming at the problems in an RC-IGBT device in the prior art: by optimizing the back n of the RC-IGBT device⁺Compared with the traditional RC-IGBT device, the RC-IGBT device provided by the invention has the advantages that through the special design of the back structure, the problem of the rebound of the turn-on voltage of the device can be inhibited on the basis of maintaining lower forward and reverse conduction losses of the device and not increasing the process cost, and the reliability of the RC-IGBT in practical application is favorably improved.

Description

Reverse conducting type insulated gate bipolar transistor

Technical Field

The invention relates to a power semiconductor device, in particular to a structure design of a reverse conducting insulated gate bipolar transistor (RC-IGBT), namely the reverse conducting insulated gate bipolar transistor.

Background

Insulated Gate Bipolar Transistors (IGBTs) are key semiconductor devices in electronic systems, and are widely used in various medium-high voltage power control systems, such as motor driving, power conversion, and the like. An IGBT device comprises three electrodes: a collector, an emitter, and a gate for controlling the switching of the device. Generally, a conventional IGBT is equivalent to a PNP transistor with an open-base region when a gate is turned off, and therefore, the conventional IGBT does not have a reverse freewheeling capability, so that the conventional IGBT can only be used as a one-way conduction device, that is, current can only flow from a collector to an emitter. However, most power circuit systems have a requirement for bidirectional current conduction, so in practical applications, an IGBT and a Diode (Diode) are often used in anti-parallel, and bidirectional current conduction is realized through two devices together, but the number of devices and the system cost are inevitably increased by the scheme. In order to solve this problem, a novel Reverse-Conducting IGBT (RC-IGBT) structure has been proposed in recent years. Compared with the traditional IGBT, the reverse parallel diode and the traditional IGBT are integrated on the same chip by the RC-IGBT, so that the current of the RC-IGBT can flow from the collector to the emitter and from the emitter to the collector, the functions of two devices in the original scheme are realized by a single device, the power density of the chip is greatly improved, and the system cost is saved.

A schematic cross-sectional structure of a prior art RC-IGBT device 001 is shown in fig. 1. It is noted that corresponding positional words such as "upper", "lower", "left", "right", "front", "rear", "vertical", "horizontal" as referred to in this document are relative positions corresponding to the reference illustrations. The fixed direction is not limited in the specific implementation. Device 001 has three electrodes: an emitter electrode 121 at the top (labeled "E" pole in the figure), a collector electrode 122 at the bottom (labeled "C" pole in the figure), and a gate electrode 123 (labeled "G" pole in the figure). The device 001 is a trench type RC-IGBT with a gate electrode 123 formed on n^-In a series of gate grooves 110 on the surface of the drift region 101, a layer of gate dielectric layer 111 is isolated from the side wall of the corresponding gate groove 110; a p-type body region 102 adjacent to the gate trench 110, the p-type body region 102 adjoining a sidewall of the gate trench 110; above the p-type body region 102 is n⁺ Type emitter region 103 and p⁺A type contact region 104, n⁺The emitter region 103 is adjacent to one sidewall of the trench 110, and the n⁺Emitter region 103 and p⁺The type contact region 104 is connected to the emitter electrode 121; the emitter electrode 121 is isolated from the gate electrode 123 through an interlayer dielectric layer 112; at n^-The back of the drift region 101 has an n-type field stop layer 105, and p-type field stop layers 105 and collector electrodes 122 on the back of the device are arranged in a staggered manner⁺ Type collector region 106 and n⁺And a type cathode region 107. The back side doping pattern of device 001 is shown in fig. 2 (the schematic cross-sectional view in fig. 1 corresponds to section L-L' in fig. 2), where n is⁺The cathode region 107 is formed of a series of n of the same shape and size⁺Doped cell structures of n⁺The doped units are arranged in a scattered-point type periodic manner, and adjacent n⁺Between the doped units is p⁺The type collector regions 106 are spaced apart.

In device 001, gate electrode 123, gate dielectric layer 111, p-type body region 102, n⁺ Type emitter region 103, p⁺ Type contact region 104 and n^-The drift regions 101, together, form a metal-oxide-semiconductor (hereinafter referred to as "MOS") structure. In addition, p-type body regions 102, n^-Drift region 101, field stop layer 105 and back p⁺The type collector regions 106 collectively constitute a PNP type bipolar transistor (hereinafter referred to as a "PNP transistor"). The MOS structure and the PNP transistor together form an IGBT structure, so that the current of the PNP transistor can be controlled to flow from collector 122 to emitter 121 by the MOS structure, which is referred to as forward conduction of RC-IGBT current. On the other hand, p⁺ Type contact region 104, p-type body region 102, n^-Drift region 101, field stop layer 105 and n on the back surface⁺The type cathode regions 107 together form a P-I-N diode, where P⁺ Type contact region 104 and P-type body region 102 serve as the anode of the P-I-N diode, N⁺Cathode region 107 serves as the cathode of the P-I-N diode, which can be turned on when the voltage of emitter 121 of device 001 is higher than the voltage of collector 122 by more than 0.7V, and then a current flows from emitter 121 to collector 122, which is called reverse conduction of the RC-IGBT current. Note that the RC-IGBT back p⁺Collector regions 106 and n⁺The area occupation ratio of the type cathode region 107 has an extremely important influence on the loss at the time of bidirectional conduction of the RC-IGBT. A simple understanding is that for a given area of the chip, the back n is⁺The larger the proportion "δ" of the area occupied by the cathode region 107, the larger the diode region for reverse conduction, the lower the loss of reverse conduction, but correspondingly, the smaller the IGBT region (1- δ) for forward conduction, the higher the loss of forward conduction. Thus, the back n⁺The area ratio "δ" of the type cathode region 107 needs to be designed reasonably to optimize the compromise of the RC-IGBT bidirectional conduction loss.

However, the RC-IGBT device 001 of the prior art has a big problem, which limits its wide application. As shown in fig. 3, the dotted line is the normal turn-on IV curve of the conventional IGBT, the solid line is the typical forward turn-on IV curve of the prior art RC-IGBT,the RC-IGBTs of the prior art tend to have a turn-on voltage back (Snap back) phenomenon. Specifically, the RC-IGBT of the prior art has a high forward on-resistance at low current, and the forward on-voltage drop increases rapidly with the increase of the on-current, but when the on-current reaches a certain value, the on-voltage of the RC-IGBT decreases suddenly, which is reflected on the IV curve as a sudden return (snap back) phenomenon of the curve. The reason for this phenomenon is explained as follows. When the RC-IGBT turns from an off state to a forward on state, the MOS channel is opened by the grid bias voltage, and the electron current turns from n to n⁺Emitter region 103 is implanted through the MOS channel to n^- A drift region 101. The initial electron current is small due to the back p⁺The collector region 106 presents a barrier to the energy level of the electrons injecting n^-Electrons in the drift region 101 pass through the n-type field stop layer 105 and n on the back of the device⁺The cathode region 107 reaches the collector electrode 112, and accordingly, since no electrons flow toward p⁺Collector region 106, i.e., no hole carriers from p⁺Collector region 106 is reverse implanted to n^- A drift region 101. At this time, the RC-IGBT operates like a power MOSFET, i.e., all on-currents are composed of electron currents. Since the resistance of a single-carrier conducting MOSFET is higher than a double-carrier conducting IGBT, the RC-IGBT exhibits a higher on-resistance and on-voltage drop at the initial turn-on stage. On the other hand, a certain voltage drop occurs due to the electron flow through the n-type field stop layer 105, thereby generating a voltage drop at p⁺A potential difference is generated at the PN junction between the collector region 106 and the n-type field stop layer 105. When the electron current is gradually increased, the potential difference of the PN junction can finally reach more than 0.7V, and then the conduction of the PN junction is realized, so that electrons can be injected into p⁺Collector region 106, which in turn induces p⁺Collector region 106 faces n-type field stop layer 105 and n^-Holes are injected into the drift region 101. When n is^-When a large number of electron and hole carriers are present in the drift region 101, n^-The drift region 101 will have a conductivity modulation effect, so that the resistance of the region is greatly reduced, and further, the on-resistance and on-voltage drop of the RC-IGBT are greatly reduced. At this time, the operating state of the RC-IGBT is similar to that of the conventional IGBT. This sudden decrease in conduction voltage drop is reversedThe turn-on voltage folding-back phenomenon shown in fig. 3 is shown on the IV curve. This turn-on voltage foldback phenomenon has a great negative impact on the reliability of RC-IGBT applications. For example, for a plurality of parallel RC-IGBTs or an RC-IGBT with a large chip area, voltage folding points between different parallel RC-IGBT chips and between different regions inside the RC-IGBT chips are often inconsistent due to the deviation of the chip processing technology, which leads to concentrated current flowing to a certain chip or a certain local region of a single large chip, and leads to burning of the chip due to over-high current.

In order to avoid the turn-on voltage folding-back phenomenon, it is necessary to enable the PN junction between the p-type collector layer 106 and the n-type field-stop layer 105 of the RC-IGBT to be opened at as low a forward turn-on voltage of the device as possible, and several general methods include: (a) increasing n^-Doping concentration or reduction of n of the drift region 101^-The thickness of the drift region 101 to reduce n^-The resistance of the drift region, but this approach reduces the breakdown voltage of the device; (b) the doping concentration or thickness of the n-type field stop layer 105 is reduced, and the resistance of the n-type field stop layer 105 on an electron current path is increased to increase p⁺The potential difference of the PN junction between the collector region 106 and the n-type field stop layer 105 allows the PN junction to be opened at a lower electron current, but this approach also reduces the breakdown voltage of the device; (c) lengthening the current path length of electrons in n-type field stop layer 105, i.e. increasing the adjacent n⁺The spacing between cathode regions 107 may increase the resistance of n-type field stop layer 105 in the electron current path to increase p⁺The potential difference of the PN junction between the collector region 106 and the n-type field stop layer 105, but this method may aggravate the nonuniformity of the current distribution inside the device and increase the forward conduction loss of the device.

Disclosure of Invention

In view of the above-mentioned problems in the RC-IGBT device in the prior art, it is desirable to provide a design scheme capable of effectively suppressing the turn-on voltage folding back (snap back) of the device on the basis of maintaining the low conduction loss of the device.

A reverse conducting type insulated gate bipolar transistor comprises

A collector electrode at the bottom;

p arranged at intervals on the collector⁺Collector region and n⁺A cathode region;

at said p⁺Collector region and n⁺An n-type field stop layer over the cathode region; n on the n-type field stop layer^-A drift region of type;

a series of n from said^-The upper surface of the drift region extends into n^-The groove of the drift region type comprises a gate electrode, and the gate electrode is isolated from the inner wall of the corresponding groove by a gate dielectric layer;

a p-type body region over said n-type drift region, said p-type body region abutting a sidewall of the trench;

n over the p-type body region⁺Emitter region and p⁺Contact area of the n⁺The emitter region is adjacent to one sidewall of the trench;

an emitter electrode on top of the device, said emitter electrode and n⁺Emitter region and p⁺Contact area connection;

the interlayer dielectric layer is positioned between the emitter electrode and the gate electrode and separates the two electrodes;

back n of RC-IGBT device⁺The cathode region has a special distribution rule according to the back n⁺The proportion of the occupied area of the cathode region can divide the back of the device into n⁺The cathode area ratio is increased in the areas A, B, C and D, that is, n in each area is defined⁺The area ratio of the cathode region to the corresponding region is' n⁺Cathode area ratio ", indicated by the symbol" δ ", δ being a value between 0 and 1, then: n in the A region⁺The cathode region ratio delta (A) is minimal, having delta (A)< δ(B)< δ(C)<δ (D); the direction of a connecting line between the center of the area B and the center of the area A is vertical to the arrangement direction of the grooves on the front surface of the device; the direction of the connecting line between the center of the C area and the center of the A area forms an angle of 45 degrees with the arrangement direction of the grooves on the front surface of the device(ii) a The direction of the connecting line of the center of the D area and the center of the A area is parallel to the arrangement direction of the grooves on the front surface of the device.

Preferably, said n⁺The cathode region is a plurality of doping units which are distributed discretely.

Preferably, said n is⁺The pattern shape of each doped unit of the cathode region is circular, triangular, rectangular, trapezoidal, annular, star-shaped and/or polygonal.

Preferably, said n is⁺The areas of the doped units in the cathode region are the same.

Preferably, said n is⁺The doping units of the cathode region are respectively and uniformly distributed in the regions A-D.

Preferably, adjacent n in the areas A-D⁺The distances among the doped units of the cathode region are respectively defined as d (A) to d (D), and satisfy the following conditions: d (A)>d(B)>d(C)>d(D)。

Preferably, n in the A region⁺The proportion of the cathode region is less than 5 percent, the minimum can be 0 percent, namely, delta (A) is more than or equal to 0 percent<5%。

The invention also provides a reverse conducting type insulated gate bipolar transistor, wherein only one region unit is arranged at the back of the transistor, and the region A, the region B, the region C and the region D are rectangular regions.

Preferably, the A area is positioned in the middle of the back surface of the transistor.

The invention further provides a reverse conducting type insulated gate bipolar transistor, which comprises A, B, C and D four subareas, wherein the area unit also comprises an E area, the E area is a projection area of a terminal voltage-resisting area on the front side of the transistor corresponding to the back side of the transistor, and n of the E area⁺The cathode region has a higher proportion than the other regions.

Preferably, n of said E region⁺The proportion of the cathode region is 100 percent, namely n in the E region⁺The cathode region is completely occupied and has no p⁺Collector region, i.e., δ (E) = 1.

The main operating principle of the RC-IGBT device of the invention is explained as follows. For the RC-IGBT of the strip-shaped groove gate, since electron current is injected into the n-drift region along the MOS channel on the side wall of the groove, the electron current is in the direction parallel to the arrangement direction of the groove in the n-drift regionThe electron current density is high, and the electron current density in the direction perpendicular to the direction of arrangement of the trenches is low. Based on the method, in order to inhibit the problem of turn-on voltage rebound and maintain lower forward and reverse conduction losses of the device, the RC-IGBT of the invention is used for n on the back surface of the device⁺The cathode region distribution is uniquely designed, specifically, when the device is in forward conduction, by setting smaller n in the region A⁺Cathode area ratio and higher p⁺Collector region ratio such that p in the A region⁺The PN junction between the collector region and the n-type field stop layer can be opened and hole carriers are injected under the condition of low current, so that the forward on-resistance of the device is reduced, and the rebound problem of the opening voltage is solved; when hole carriers are injected into the region A first, the hole carriers diffuse into the peripheral region of the region A, and the forward on-resistance of the peripheral region is reduced^-The drift region tends to diffuse in the direction of higher electron concentration; since the orientation of the D region relative to the A region is parallel to the arrangement direction of the grooves on the surface of the device, n above the D region^-The electron density in the drift region is higher, and then more hole carriers can be attracted to diffuse into the region, the forward on-resistance of the region is reduced, and therefore higher n can be arranged in the D region⁺The cathode region ratio does not increase the forward conduction loss of the device; accordingly, since the orientation of the B region with respect to the A region is perpendicular to the direction of arrangement of the trenches on the surface of the device, n in the B region is set⁺The cathode region ratio is low; the C region is oriented between the B region and the D region, thereby setting n in the C region⁺The cathode region ratio is between n of the B region and the D region⁺The cathode region ratio. On the other hand, when the device is turned on in the reverse direction, n in the region A is reduced⁺The area of the cathode region can be increased by n in the D region⁺The area of the cathode region is compensated so that the device n⁺The total area of the cathode region is not reduced, and the reverse conduction loss of the device is not increased.

It should be noted that the processing process flow of the RC-IGBT device of the present invention may be the same as that of the RC-IGBT of the prior art, and only the mask of different patterns is used when forming the doped region on the back of the device. Therefore, compared with the RC-IGBT in the prior art, the RC-IGBT device does not increase the process cost.

In summary, compared with the traditional RC-IGBT device, the RC-IGBT device provided by the invention can inhibit the problem of the rebound of the turn-on voltage of the device on the basis of maintaining lower forward and reverse conduction losses of the device and not increasing the process cost through the special design of the back structure, and is favorable for improving the reliability of the RC-IGBT in practical application.

Drawings

Fig. 1 is a schematic cross-sectional structure diagram of a prior art RC-IGBT device 001.

Fig. 2 is a schematic diagram of the back side doping profile of a prior art RC-IGBT device 001.

Fig. 3 is a graph comparing the forward opening I-V curves of a conventional IGBT and a prior art RC-IGBT.

Fig. 4 is a schematic diagram of backside region division of the RC-IGBT device 002 according to the first embodiment of the present invention.

Fig. 5 is a schematic diagram of doping profiles of regions on the back surface of an RC-IGBT device 002 according to the first embodiment of the invention.

Fig. 6 is a schematic cross-sectional structure diagram of the RC-IGBT device 002 according to the first embodiment of the present invention corresponding to the line M-M' in fig. 5.

Fig. 7 is a schematic cross-sectional structure diagram of the RC-IGBT device 002 according to the first embodiment of the present invention corresponding to the N-N' cut line in fig. 5.

Fig. 8 is a schematic diagram of backside region division of an RC-IGBT device 003 according to the second embodiment of the present invention.

Fig. 9 is a schematic diagram of doping profiles of regions on the back surface of an RC-IGBT device 003 according to a second embodiment of the invention.

Fig. 10 is a backside region division schematic diagram of an RC-IGBT device 004 according to the third embodiment of the present invention.

Fig. 11 is a schematic diagram of doping profiles of regions on the back surface of an RC-IGBT device 004 according to the third embodiment of the invention.

Detailed Description

The present invention will be described belowThe embodiments of the device of (1) are specifically illustrated. It is noted that in the following description of the embodiments of the RC-IGBT device of the present invention, the semiconductor substrate of the RC-IGBT device is considered to be composed of a silicon (Si) material. However, the substrate may be made of any other material suitable for manufacturing an IGBT, such as germanium (Ge), silicon carbide (SiC), and the like. In the following description, the dielectric material of the IGBT device may be made of silicon oxide (SiO)_x) And (4) forming. However, other dielectric materials may be used, such as silicon nitride (Si)_xN_y) Aluminum oxide (Al)_xO_y) And silicon oxynitride (Si)_xN_yO_z) And the like. In the following description, the conductivity types of a semiconductor region are classified into p-type and n-type. A p-type conductivity semiconductor region may be formed by doping the original semiconductor region with one or more impurities which may be, but are not limited to: boron (B), aluminum (Al), gallium (Ga), and the like. An n-type conductive semiconductor region may also be formed by doping the original semiconductor region with one or more impurities which may be, but are not limited to: phosphorus (P), arsenic (As), tellurium (Sb), selenium (Se), protons (H)⁺) And the like. In the following description, the heavily doped p-type conductive semiconductor region is labeled p⁺Region, the heavily doped n-type conductive semiconductor region being labeled n⁺And (4) a zone. For example, in a silicon material substrate, the impurity concentration of a heavily doped region is typically 1 × 10, unless otherwise specified¹⁹ cm^-3To 1X 10²¹ cm^-3In the meantime. In the following description, the lightly doped p-type conductivity semiconductor region is labeled as p^-Region, the lightly doped n-type conductive semiconductor region being labeled n^-And (4) a zone. For example, in a silicon material substrate, a lightly doped region typically has an impurity concentration of 1 × 10, unless otherwise specified¹² cm^-3To 1X 10¹⁵ cm^-3In the meantime. In addition, the following embodiments will be described with respect to an RC-IGBT device using an n-type MOS channel, but it should be noted that the present invention is also applicable to an RC-IGBT device using a p-type MOS channel.

Example 1

Device 00Reference numeral 2 denotes an RC-IGBT device according to a first embodiment of the present invention. Similar to the prior art RC-IGBT device 001, the device 002 of the present invention is a trench gate type device, i.e. it has a series of parallel arranged stripe-shaped trenches in its front side. Fig. 4 is a schematic diagram of dividing the back surface area of the device 002, and referring to the arrangement direction of the front surface trenches of the device, the back surface of the device 002 is divided into A, B, C, D total 4 types of rectangular areas, where: the A area 21 is positioned in the middle of the back surface of the device 002, and the direction of the connecting line of the center of the B area 22 and the center of the A area 21 is vertical to the arrangement direction of the grooves on the front surface of the device; the direction of the connecting line of the center of the C area 23 and the center of the A area 21 forms an angle of 45 degrees with the arrangement direction of the grooves on the front surface of the device; the direction of the connecting line of the center of the D area 24 and the center of the A area 21 is parallel to the arrangement direction of the grooves on the front surface of the device. FIG. 5 is a schematic illustration of the doping profile of the back side regions of device 002, including p⁺Doped collector region 206 and n⁺ Doped cathode region 207, said n⁺The cathode region 207 is a series of discretely distributed doped units, each doped unit may be in the shape of at least one of a circle, a triangle, a rectangle, a trapezoid, a ring, a star, a polygon, or a combination thereof, the area of each doped unit may be uniform, and adjacent n doped units are adjacent to each other⁺Between cathode regions 207 by p⁺Collector regions 206 are spaced apart. Fig. 6 and 7 are schematic cross-sectional views of device 002 taken along lines M-M 'and N-N' of fig. 5, respectively. Viewed in cross-section, device 002 has: collector 222, p at the bottom⁺Collector regions 206 and n⁺Cathode regions 207 are alternately arranged on the collector 222, and an n-type field stop layer 205 is disposed on the p⁺Collector regions 206 and n⁺Above the cathode region 207, an n^- A drift region 201 of type is located above the n-type field stop layer 205, in series from the n^-The upper surface of the drift region 201 extends into n^-The trench 210 of the drift region 201, a gate electrode 223 formed in one trench 210, the gate electrode 223 being isolated from the inner wall of the corresponding trench 210 by a gate dielectric layer 211, and a p-type body region 202 located in the n-type body region^-An n-type drift region 201 above and adjacent to a sidewall of the trench 210⁺ Emitter region 203 and a p⁺Contact region 204 is located over the p-type body region 202,n is⁺The emitter region 203 adjoins a sidewall of the trench 210, an emitter electrode 221 is positioned on the top of the device and connects the n⁺Emitter region 203 and p⁺In contact region 204, an interlevel dielectric layer 212 is located between the emitter electrode 221 and the gate electrode 223 and separates the two electrodes.

Defining n in various regions of the back surface of the device⁺The ratio between the area of the cathode region 207 and the area of the corresponding region is "n⁺Cathode area ratio, indicated by the symbol "δ", which is a number between 0 and 1, n of the areas A-D⁺The cathode region ratios are respectively expressed as δ (a), δ (B), δ (C), δ (D), and then: delta (A)< δ(B)< δ(C)<δ (D). Wherein n of the A region 21⁺The cathode region ratio is generally not higher than 10% and can be as low as 0%, i.e., n in the A region 21 can be completely absent⁺The cathode region 207. Further, a constitution n⁺Each doping unit of the cathode region 207 can be uniformly distributed in the regions A-D respectively, and the adjacent n in the regions A-D⁺The spacing between the doped units in the cathode region is defined as d (A) to d (D), respectively, and comprises: d (A)>d(B)>d(C)>d(D)。

As described above, when device 002 is conducting in the forward direction, current is injected into n due to the MOS channel along the sidewall of trench 210^-Of the drift region 201, and thus at n^-In the drift region 201, the electron current density in the direction parallel to the arrangement direction of the trenches 210 is high, and the electron current density in the direction perpendicular to the arrangement direction of the trenches 210 is low. By setting a smaller n in the a region 21⁺Cathode region 207 ratio and higher p⁺Collector region 206 can be scaled such that p in a region 21⁺The PN junction between the collector region 206 and the n-type field stop layer 205 can be opened and hole carriers are injected under the condition of low current, so that the forward on-resistance of the device is reduced, and the rebound problem of the opening voltage is solved; when injection of hole carriers occurs first in the a region 21, the hole carriers diffuse into the peripheral region of the a region 21, and the forward on-resistance of the peripheral region is reduced, and in particular, the injected hole carriers are attracted at n by the principle of attraction of opposite charges^-Within the drift region 205, tending to follow the electronsHigh concentration directional diffusion; since the orientation of D region 24 relative to A region 21 is parallel to the direction of the arrangement of trenches 210 on the device surface, n above D region 24^-The higher electron density in drift region 201, in turn, may attract more hole carriers to diffuse into this region, reducing the forward on-resistance of this region, and thus a higher n may be provided in D region 24⁺The cathode region ratio does not increase the forward conduction loss of the device; accordingly, since the orientation of the B region 22 with respect to the a region 21 is perpendicular to the arrangement direction of the trenches 210 on the device surface, n in the B region 22 is set⁺The cathode region ratio is low; the C region 23 is located between the B region 22 and the D region 24, thereby setting n in the C region 23⁺The cathode region ratio is between n of the B region 22 and the D region 24⁺The cathode region ratio. On the other hand, when the device is turned on in the reverse direction, n in the A region 21 is decreased⁺ Cathode region 207 area can be increased by n in D region 24⁺The cathode region 207 area is compensated so that the device n⁺The total area of the cathode region 207 is not reduced and thus the reverse conduction loss of the device is not increased.

The corresponding structural parameters of the device 002 are designed as follows, depending on its operating principle. It is noted that the structural parameters of device 002 are related to its voltage rating. Corresponding structural design parameters are provided below by taking a 600V class RC-IGBT as an example. In this example, n of device 002^-The drift region 201 may have a thickness of 40 to 80 μm and a doping concentration of 5e¹³To 5e¹⁴cm^-3. Back p⁺ Type collector region 206 can have a thickness of 0.2 to 1 micron and a peak dopant concentration of 5e¹⁶To 1e¹⁸ cm^-3Back n⁺The cathode region 207 may have a thickness of 0.2 to 1 μm and a peak doping concentration of 5e¹⁸To 1e²⁰ cm^-3Form n⁺The doped cells of the cathode region 207 may have a side length or diameter of 5 microns to 50 microns, with adjacent n⁺The spacing between doped cells of the cathode region 207 may be between 50 microns and 500 microns. The width of the back side A-D region can be 100 microns to 1000 microns, n⁺The cathode region 207 may occupy the regions on the back surface in the following ratio: delta (A) is more than or equal to 0<5%, δ(A)<δ(B)<10%, δ(B)<δ(C)<15%, δ(C)<δ(D)<30 percent. The back n-type field stop layer 205 may be 1 to 30 microns thick and may have a peak doping concentration of 1e¹⁵To 5e¹⁶ cm^-3. P-type body region 204 may have a thickness of 1 to 4 microns and a peak doping concentration of 5e¹⁶To 5e¹⁷cm^-3. The peak doping concentration of the P-type body region 202 may be 1e¹⁶To 5e¹⁷cm^-3And the bottom of this layer is typically not deeper than the depth of the gate trench 210. The trench depth of the gate trench 210 may be 3 to 7 micrometers and the trench width may be 0.5 to 2.5 micrometers. The trench depth of gate trench 210 should be greater than the thickness of the adjacent p-type body region 202 to enable the formation of a MOS channel at one sidewall of the trench. The horizontal spacing between adjacent trenches may be 0.3 to 3 microns. Further, n is⁺The junction depth of the type emitter region 203 may be 0.1 to 0.5 micrometers. P⁺The junction depth of the type contact region 204 may be 0.3 to 1.5 microns. The thickness of the gate dielectric layer 211 may be 0.05 to 0.2 microns. The thickness of the interlayer dielectric layer 212 may be 0.3 to 2 micrometers.

It should be noted that the processing process flow of the RC-IGBT device 002 of the present invention may be the same as that of the RC-IGBT of the prior art, and only the mask of different patterns is used when forming the doped region on the back of the device. Therefore, the RC-IGBT device 002 of the present invention does not increase the process cost compared to the RC-IGBT of the prior art.

Example 2

Fig. 8 is a schematic diagram of dividing the back surface region of an RC-IGBT device 003 according to the second embodiment of the invention, and fig. 9 is a schematic diagram of doping distribution of each region of the back surface of the device 003. With respect to device 002 of the first embodiment of the present invention, device 003 also has the following characteristics: there is more than one class a region 21 at the back of the device 003, and the position of the class a region 21 is not limited to the middle of the back of the device 003. The region division characteristic of the device 003 is suitable for large-area RC-IGBT chips, and is favorable for improving the current uniformity inside the large-area RC-IGBT chips.

Example 3

FIG. 10 is a schematic diagram of backside area division of an RC-IGBT device 004 according to a third embodiment of the present invention, and FIG. 11 is a schematic diagram ofSchematic doping profile of various regions of the backside of device 004. Relative to the RC-IGBT devices 002 and 003 of the present invention, device 004 also has the following characteristics: setting the projection area of the terminal voltage-withstanding area on the front side of the device 004 corresponding to the back side of the device 004 as an E area (25), and then n in the E area (25)⁺The highest ratio of the cathode region, i.e. delta (A)< δ(B)< δ(C)< δ(D)<δ (E). Delta (E) may be equal to 1 at most, i.e. n in the E region (25)⁺ Cathode region 207 is completely covered with no p⁺ A collector region 206. Because the terminal voltage-withstanding region of the RC-IGBT has no MOS channel, the region can not be used as a conduction current, and p in the back surface region corresponding to the terminal voltage-withstanding region is increased by increasing delta (E)⁺ Collector region 206 is reduced to reduce the turn-off loss of the device without significantly affecting the device forward turn-on loss.

Claims

1. A reverse conducting type insulated gate bipolar transistor comprises

A collector electrode at the bottom;

the interlayer dielectric layer is positioned between the emitter electrode and the gate electrode and isolates the emitter electrode from the gate electrode;

it is characterized in that the preparation method is characterized in that,

the back of the transistor is provided with more than one area unit, the area unit is divided into an area A, an area B, an area C and an area D, the proportion of n + cathode areas is increased in sequence, and the direction of a connecting line between the center of the area B and the center of the area A is vertical to the arrangement direction of the grooves on the front of the device; the direction of the connecting line of the center of the area C and the center of the area A forms an angle of 45 degrees with the arrangement direction of the grooves on the front surface of the device; the direction of a connecting line between the center of the area D and the center of the area A is parallel to the arrangement direction of the grooves on the front surface of the device;

n is⁺The cathode region ratio refers to n within a region⁺The ratio between the area of the cathode region and the area of the corresponding region.

2. The reverse conducting insulated gate bipolar transistor according to claim 1, wherein n is n⁺The cathode region is a plurality of doping units which are distributed discretely.

3. The reverse conducting igbt according to claim 1, wherein n is n⁺The pattern shape of each doped unit of the cathode region is circular, annular and/or polygonal.

4. The reverse conducting igbt according to claim 1, wherein n is n⁺The areas of the doped units in the cathode region are the same.

5. The reverse conducting igbt according to claim 1, wherein n is n⁺The doping units of the cathode region are respectively and uniformly distributed in the regions A-D.

6. The reverse conducting IGBT according to claim 5, wherein adjacent n in the regions A-D⁺The distance between the doped units in the cathode region satisfies the following conditions:d(A)>d(B)>d(C)>d(D)。

7. the reverse conducting igbt according to claim 1, wherein n in the a region⁺The proportion of the cathode area is less than 5 percent.

8. The reverse conducting igbt according to any one of claims 1 to 7, wherein a region unit is provided on the back side of the transistor, and wherein the regions A, B, C and D are rectangular regions.

9. The reverse conducting igbt according to claim 8, wherein the a region is located in the middle of the back surface of the transistor.

10. The reverse conducting IGBT according to any of claims 1-7, wherein the region unit further comprises a region E, the region E is a projection region of a terminal voltage-withstanding region on the front side of the transistor on the back side of the transistor, and the region E is n⁺The cathode region has a higher proportion than the other regions.

11. The reverse conducting igbt according to claim 10, wherein n of the E region is n⁺The cathode region proportion is 100%.