CN1092813C - Programmable controller - Google Patents
Programmable controller Download PDFInfo
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- CN1092813C CN1092813C CN96190261A CN96190261A CN1092813C CN 1092813 C CN1092813 C CN 1092813C CN 96190261 A CN96190261 A CN 96190261A CN 96190261 A CN96190261 A CN 96190261A CN 1092813 C CN1092813 C CN 1092813C
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Abstract
Each input terminal (1) is respectively connected to an input part (2). The first selector (22) of the input part (2) outputs input signals to any of an identification circuit (23), a rising edge detection circuit (24) and a falling edge detection circuit (25) according to the setting of a register (4). When input signals are output to the identification circuit (23), the input signals are used by a counter. Furthermore, when input signals are output to places with the rising edge detection circuit (24) or the falling edge detection circuit (25), the input signals are used for detecting rising edges or falling edges and processing interruption which is caused by the rising edges or the falling edges. The setting of the register (4) is changed by a CPU (3), so the input signals which are connected to the input terminals (1) can be used by converting various functions.
Description
Technical field
The present invention relates to the programmable controller (following abbreviation PC) that the on/off signal according to outside input carries out control operation.
Background technology
Always, thus have the functions such as detection, Interrupt Process, counter of the rising edge of input signal and trailing edge as the PC that carries out control operation from outside input on/off signal.
In PC, in order to realize these functions, just be provided with the rising edge testing circuit that detects the input signal rising edge, the trailing edge testing circuit that detects the input signal trailing edge, when rising edge that detects input signal or trailing edge, produce the interrupt circuit of look-at-me and the counter circuit that input signal is counted, in each circuit of each function, all distribute specific input terminal.Thereby, using desirable function occasion, input signal is connected on the input terminal that circuit distributed of desired function.
Summary of the invention
In above-mentioned PC, because each of each functions such as the detection of input signal rising edge, the detection of trailing edge, Interrupt Process sum counter all will be distributed specific input terminal, so that input signal is necessary with wishing that input terminal that function is distributed is connected, this is with regard to the problem of the using method inconvenience that has PC.
And, the quantity of each input terminal of each function is predesignated, because the quantity of each necessary input terminal of each function is different because of the purposes of PC, in each input terminal of each function, produce untapped input terminal, so the useless problem of circuit with regard to there being untapped input terminal.
The present invention develops in view of the above problems, the purpose of this invention is to provide a plurality of PC that use an input signal functionally of a kind of energy conversion.
In order to finish above-mentioned purpose, the present invention has the register of setting the input signal contents processing; The delay circuit of the time constant delay input signal of setting with register; When selecting, detect from the rising edge testing circuit of the rising edge of delay circuit input signal by the setting of register; When selecting, detect from the trailing edge testing circuit of the trailing edge of delay circuit input signal by the setting of register; The signal that will to be counting from the signal distinguishing of delay circuit input when being selected by the setting of register use with, subtraction with, addition distinguish circuit; The memory circuit of the testing circuit detection signal of selecting by the setting of register in rising edge testing circuit and trailing edge testing circuit stored; In rising edge testing circuit and trailing edge testing circuit, produce the interrupt circuit of look-at-me by the input of the testing circuit detection signal selected by the setting of register; The counter circuit that the output signal of distinguishing circuit is counted; In set-up register, in the count signal of the look-at-me of the detection signal of memory circuit, interrupt circuit or counter circuit, extract the control part of the selected signal of register; Owing to the contents processing that can change an input signal by the setting of register,, has good result easy to use so an input signal can a plurality ofly be used functionally.And, by the setting of register, can change the combination of circuit, thereby translation function so each of each function needn't be provided with specific circuit, has the effect of saving useless circuit.
The output signal that also has in delay circuit and memory circuit the circuit that will select because of the setting of register among the present invention is exported to the selection circuit of control part, because control part can extract the output signal of the circuit of selecting because of the setting of register in interrupt circuit, counter circuit or selection circuit, so can make input signal by and input to control part, so can carry out treatment desired to an input signal, have good result easy to use.And,,, have the effect of omitting useless circuit so can in an input part, realize multiple function owing to the combination that can change circuit by the setting of register.
Description of drawings
Fig. 1 is the block scheme of the PC input part of expression one embodiment of the invention.
Fig. 2 is the block scheme of the above-mentioned PC of expression.
Embodiment
The PC of present embodiment, as shown in Figure 2, be to constitute by the CPU3 of the control part of controlling computing from the input part 2 of the input terminal 1 of outside input input signal, signal Processing that is provided with respectively at each input terminal 1 and that the input signal that inputs to input terminal 1 is stipulated, as the signal of importing according to input part 2 and the register 4 of setting the contents processing of input part 2 by CPU3, the contents processing of input part 2 is changed in predetermined function by the setting of register.
Input part 2 is the delay circuit of being used by the input filter that the time constant that the input signal that is input to input terminal 1 is set by register 4 postpones 21 as shown in Figure 1; To export to the 1st selector switch 22 that counter usefulness, rising edge detection usefulness or trailing edge detect usefulness distributively because of the setting of register 4 by the input signal of delay circuit 21; Setting by register 4 will be from the signal distinguishing of the 1st selector switch 22 inputs count signal, additive signal and subtraction signal distinguish circuit 23; Detection is from the rising edge testing circuit 24 of the signal rising edge of the 1st selector switch 22 inputs; Detection is from the trailing edge testing circuit 25 of the signal trailing edge of the 1st selector switch 22 inputs; To count and count value exported to the counter circuit 26 of the counter passage (not shown) of CPU3 from count signal, additive signal or the subtraction signal of distinguishing circuit 23 inputs; When the output signal of the testing circuit of being selected by the setting of register 4 is imported, look-at-me is exported to the interrupt circuit 27 of the interrupting channel 31 of CPU3 in rising edge testing circuit 24 and trailing edge testing circuit 25; In rising edge testing circuit 24 and trailing edge testing circuit 25, as the trigger circuit 28 of the memory circuit of the detection signal of the testing circuit selected by the setting of register 4 of storage; In the output signal of the output signal of the delay circuit of importing by the 1st selector switch 22 21 and trigger circuit 28, export to as the output signal that will select by the setting of register 4 that the 2nd selector switch 29 of selection circuit of the input channel 32 of CPU3 constitutes.
At this, by the setting of PCU3 change register 4, the combination of circuits of the input part 2 that is connected with each input terminal 1 is changed, change the function of each input terminal 1, so can change a plurality of input signals that use functionally.And the time constant that delay circuit 21 makes the input signal that is input to input terminal 1 set with register 4 postpones, and removes the noise component of input signal, prevents the vibration of input signal.The time constant of delay circuit 21 is because by register 4 settings, so the time constant delay input signal that can adapt with the function with input part 2.
So, when CPU3 set on register 4 for the detection that input signal is used in rising edge, in the setting of input part 2 according to register 4, the 1st selector switch 22 was exported to rising edge testing circuit 24 with the output signal of delay circuit 21.Rising edge testing circuit 24 1 detects the rising edge of input signal, just detection signal is exported to trigger circuit 28.Trigger circuit 28 are exported to the 2nd selector switch 29 in the detection signal of storage rising edge testing circuit 24.The 2nd selector switch 29 is exported to the output signal of trigger circuit 28 input channel 32 of CPU3 according to the setting of register 4.CPU3 is by taking a sample to input channel 32, detects the detection signal of the rising edge testing circuit 24 that input channel 32 imported, and just can detect the rising edge of input signal.
And CPU3 carries out Interrupt Process when setting for the trailing edge at input signal on register 4, and the 1st selector switch 22 is exported to trailing edge testing circuit 25 by the setting of register 4 with the output signal of delay circuit 21.Trailing edge testing circuit 25 1 detects the trailing edge of input signal, just detection signal is exported to interrupt circuit 27.Interrupt circuit 27 is just exported to look-at-me the interrupting channel 31 of CPU3 as from trailing edge testing circuit 25 input detection signals.CPU3 just carries out Interrupt Process as look-at-me being inputed to interrupting channel 31.
In addition, CPU3 is for being used for input signal in counter when setting on register 4, and the 1st selector switch 22 is exported to the output signal of delay circuit 21 and distinguished circuit 23 according to the setting of register 4 in input part 2.Distinguish that circuit 23 is characterized as the output signal of delay circuit 21 signal that counting is used, addition is used or subtraction is used and exports to counter circuit 26.26 pairs of counter circuits are counted from the signal of distinguishing circuit 23 inputs, and output signal are exported to the counter passage of CPU3.
Interrupt circuit 27 and trigger circuit 28 can also can extract detection signal from the both sides of rising edge testing circuit 24 and trailing edge testing circuit 25 from any the circuit extraction detection signal in rising edge testing circuit 24 or the trailing edge testing circuit 25 according to the setting of register 4.And, according to the setting of register 4, also can on interrupt circuit 27, produce the look-at-me that the output signal by counter circuit 26 causes.
Like this, change the combination of circuits of input part 2, just can use an input signal in translation function ground by the setting of CPU3 change register 4.
Also have, the combination of each circuit of input part 2 is not limited to above-mentioned combination, also can convert a plurality of input signals that use functionally to by the combination beyond the combinations thereof, and this is self-evident.
Claims (2)
1. a programmable controller is characterized in that it has: the register of setting the input signal contents processing; The delay circuit of the time constant delay input signal of setting with register; Detection is from the rising edge testing circuit of the rising edge of the signal of delay circuit input when being selected by the setting of register; Detection is from the trailing edge testing circuit of the trailing edge of the signal of delay circuit input when being selected by the setting of register; The signal that will to be counting from the signal distinguishing of delay circuit input when being selected by the setting of register use with, subtraction with, addition distinguish circuit; The memory circuit of the testing circuit detection signal of selecting by the setting of register in rising edge testing circuit and trailing edge testing circuit stored; In rising edge testing circuit and trailing edge testing circuit, produce the interrupt circuit of look-at-me by the input of the testing circuit detection signal selected by the setting of register; The counter circuit that the output signal of distinguishing circuit is counted; In set-up register, in the count signal of the look-at-me of the detection signal of memory circuit, interrupt circuit or counter circuit, extract the control part of the selected signal of register.
2. programmable controller as claimed in claim 1, it is characterized in that, the output signal that also has the circuit that will be selected by the setting of register in delay circuit and memory circuit is exported to the selection circuit of control part, and control part extracts the output signal of the circuit of being selected by the setting of register in interrupt circuit, counter circuit or selection circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN96190261A CN1092813C (en) | 1996-03-06 | 1996-03-06 | Programmable controller |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN96190261A CN1092813C (en) | 1996-03-06 | 1996-03-06 | Programmable controller |
Publications (2)
Publication Number | Publication Date |
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CN1172538A CN1172538A (en) | 1998-02-04 |
CN1092813C true CN1092813C (en) | 2002-10-16 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN96190261A Expired - Fee Related CN1092813C (en) | 1996-03-06 | 1996-03-06 | Programmable controller |
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CN (1) | CN1092813C (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
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KR100444703B1 (en) * | 2002-10-01 | 2004-08-16 | 삼성전자주식회사 | Memory device having high bus efficiency of network and the operation method thereof and memory system including the same |
CN101334651B (en) * | 2007-06-27 | 2014-10-15 | 施耐德电器工业公司 | Programable controller and its channel selection method |
KR101079898B1 (en) | 2010-04-09 | 2011-11-04 | 엘에스산전 주식회사 | PLC's Input Module |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0329003A (en) * | 1989-06-27 | 1991-02-07 | Matsushita Electric Works Ltd | I/o control unit |
JPH04302307A (en) * | 1991-03-29 | 1992-10-26 | Suzuki Motor Corp | Connector |
-
1996
- 1996-03-06 CN CN96190261A patent/CN1092813C/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0329003A (en) * | 1989-06-27 | 1991-02-07 | Matsushita Electric Works Ltd | I/o control unit |
JPH04302307A (en) * | 1991-03-29 | 1992-10-26 | Suzuki Motor Corp | Connector |
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CN1172538A (en) | 1998-02-04 |
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Granted publication date: 20021016 |