CN108733583B - Pre-reading method and system for improving NVMe SSD sequential data reading performance - Google Patents
Pre-reading method and system for improving NVMe SSD sequential data reading performance Download PDFInfo
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Abstract
The invention discloses a pre-reading method and a pre-reading system for improving NVMe SSD sequential data reading performance, and relates to the technical field of NVMe SSD sequential data reading. The method comprises the following steps: reading the commands in the command sequence SQ according to different types of sequence data, forming a command processing sequence after arbitration, and classifying the commands according to the different types; when the first n commands of the same type of command are read, data corresponding to the other commands form a pre-read command queue in sequence from the (n + 1) th command in the type of command, and the pre-read command queue is stored in a data cache for subsequent reading. The system comprises: the device comprises a command pre-fetching module, a command processing module and a data pre-reading module. The invention can classify the commands in the command processing queue, so that the pre-reading method takes effect, the data is ensured to be loaded into the cache in advance, the reading performance of the sequential data is improved, and the service life of the SSD is prolonged.
Description
Technical Field
The invention relates to the technical field of NVMe SSD sequential data reading, in particular to a pre-reading method and a pre-reading system for improving NVMe SSD sequential data reading performance.
Background
Hard disks including HDD (Hard Disk Drive) and SSD (Solid State Drive), wherein SSD is a data storage device composed of NAND FLASH arrays. In order to improve the performance of sequential data reading, a pre-reading method is usually designed in the firmware, and by analyzing a command sequence sent by a HOST, when a sequential data reading operation is monitored, the firmware loads the HOST, that is, data to be read, from a nonvolatile storage medium with a relatively slow access speed to a hard disk internal cache in advance. When a subsequent data read command from HOST hits the cache, the firmware transfers the data directly from the cache to HOST, reducing the command latency increase and bandwidth reduction due to accessing the low speed non-volatile storage medium.
In the design of the prior pre-reading method, when judging whether a HOST command sequence is a sequential Data reading operation, the firmware mainly looks at whether the HOST command sequence is a sequential Data reading command or not, and the starting LBA and the Data Block number of the previous command and the next command, when the starting LBA of the next command and the ending LBA of the previous command are continuous, the sequential Data reading command sequence can be judged, and at the moment, the pre-reading method takes effect and starts the Data pre-reading operation. In order to maintain the context of data pre-reading, a data pre-reading queue is usually designed to manage the status of data pre-reading operation, and when the firmware processes the subsequent HOST data read command, the firmware queries the data pre-reading queue to determine whether the command hits in the cache.
Taking NVMe SSD of fig. 1 as an example, NVMe (NVM (Non-Volatile Memory) Express), an SSD interface protocol based on pcie (pci Express) data transfer. In the figure, the Single Function is a PCIe device with a Single functional unit, and HOST creates N SQ (command sequence) responsible for sending commands to the SSD for the NVMe SSD. And the SQ 0 is an Admin sub permission Queue and is responsible for sending an Admin command to the SSD, and the other SQs are I/O sub permission queues and are responsible for sending an I/O command to the SSD. The NVMe controller acquires commands from the Command queues SQ 0-SQ N according to a preset arbitration rule and sends the commands to a Command processing module (Command Processor) for processing through a Command processing queue (Command processQueue).
In fig. 1, the HOST application or system service process sends a data read command to the SSD through SQ1, and the other SQ is in an idle state, and no command needs to be processed. The NVMe controller takes out the command in SQ1 and sends the command to the command processing module through the command processing queue for processing, when the command processing module finds that the ending LBA (Logical Block Address) of the command A0 and the starting LBA of the command A1 are continuous, the Read-Ahead method takes effect, and after the command A1 is processed, the Read-Ahead module (Read Ahead) is informed to load the data related to the HOST commands A2, A3 and … from NAND FLASH into the cache in advance. When the command processing module begins processing HOST command a2, it finds that its data hits in the cache and passes the data corresponding to HOST command a2 directly from the corresponding cache location to HOST. At the same time, the read-ahead module continues to load new data from NAND FLASH to ensure that subsequent HOST commands can continue to hit the cache.
The pre-reading method is the most common design in the current SSD (including SATA SSD and NVMe SSD) firmware, and the strategy is greatly helpful for improving the SSD sequential data reading performance. The design has completely satisfied the requirement for SATASSD with only one HOST command queue, but for NVMe SSD with multiple HOST command queues, the read-ahead method cannot be effective under certain conditions, especially under the condition that the HOST-side application program or system service process has frequent concurrent accesses to the SSD, so that the sequential data reading performance is reduced.
Since the existing pre-reading method only focuses on the starting LBA and the number of Data blocks (Data blocks, the minimum logical unit for storing Data in the hard disk) of the HOST read command, for the NVMe SSD supporting creation of multiple I/O SQ, the command processing sequence received by the command processing module is actually the result of arbitration of the commands in the multiple SQ. Therefore, in an application scenario where multiple threads access the SSD concurrently at the HOST end, a sequential data read command originally sent to a certain I/O SQ is disturbed due to the SQ arbitration mechanism of the NVMe, which causes the pre-read method to fail (i.e. the sequential data read command sequence is not recognized), and even causes the repeated loading of the same data from NAND FLASH by the pre-read command and the HOST read command, which may cause the system performance to be degraded. The following is a case analysis of the failure of the two read-ahead methods.
Referring to fig. 2, an application program on the HOST side sends out the sequence of sequential data read commands through SQ1, while other applications on the HOST side send out commands without any association with the commands in SQ1 through SQ2 and SQ3, respectively. In the arbitrated command processing sequence, B0 and C0 are inserted between the commands a0 and a1, and a0 and B0 are not consecutive data read operations. Therefore, the sequential data read command sequence in SQ1 is not recognized, the read-ahead method is not in effect, and the command processing module will not read ahead data for the command in SQ1 that has not been processed.
Referring to fig. 3, if different applications of the HOST end respectively issue commands through Function 0_ SQ1, Function 1_ SQ1, and Function 2_ SQ1, other SQ is in idle state. However, in the arbitrated command sequence, B0 and C0 are inserted between the commands a0 and a1, and the command processing module finds that a0 and B0 are not continuous data read operations, and the command of Function 0_ SQ1 does not start data pre-read operations. Since the read-ahead method is not effective, the command processing module cannot prepare Data in advance for the command which is not processed in Function 0_ SQ1, so that the HOST read command and the Data read-ahead command repeatedly load the same Data from NAND FLASH, but the system performance is reduced, and therefore the access times to NAND FLASH are increased, the influence on Data Retention (the integrity degree of Data recorded in a non-volatile storage medium) indirectly influences the service life of NAND FLASH, and the service life of the SSD is influenced.
Disclosure of Invention
The invention aims to overcome the defects of the background technology and provide a pre-reading method and a pre-reading system for improving the sequential data reading performance of an NVMe SSD. The invention can classify the commands in the command processing queue, so that the pre-reading method takes effect, and the data is ensured to be loaded into the cache in advance, thereby improving the reading performance of the sequential data and prolonging the service life of the SSD.
The invention provides a pre-reading method for improving NVMe SSD sequential data reading performance, which comprises the following steps:
reading the commands in the command sequence SQ according to different types of sequence data, forming a command processing sequence after arbitration, and classifying the commands according to the different types;
when the first n commands of the same type of commands are read, data corresponding to the other commands form a pre-read command queue in sequence from the (n + 1) th command in the type of commands, and are stored in a data cache for subsequent reading, wherein n is more than or equal to 2.
On the basis of the above technical solution, when the command processing queue is generated by a PCIe device having a single functional unit, the commands in the command processing sequence are classified according to the SQ ID.
On the basis of the technical scheme, when the command processing queue is generated by PCIe equipment with a plurality of functional units, commands in the command processing sequence are classified according to SQ ID and Function ID.
On the basis of the above technical solution, in the first n commands, the end data logical block address LBA of the previous command and the start LBA of the next command are consecutive.
On the basis of the technical scheme, when data corresponding to the command exists in the data cache, the data are directly transmitted out of the data cache.
The invention also provides a pre-reading system for improving the NVMe SSD sequential data reading performance, which comprises:
the command pre-fetching module is used for arbitrating commands in different types of sequence data reading command sequences SQ to form command processing sequences;
the command processing module is used for classifying the commands of the command processing sequence according to different types, and when the first n commands of the same type of commands are read, starting from the (n + 1) th command in the type of commands, data pre-reading requests of other commands are sent to the data pre-reading module, wherein n is more than or equal to 2;
and the data pre-reading module is used for sequentially forming a pre-reading command queue by the data corresponding to the same type of command according to different data pre-reading requests and storing the pre-reading command queue in the data cache.
On the basis of the above technical solution, when the command processing queue is generated by a PCIe device having a single functional unit, the command processing module classifies commands in the command processing sequence according to the SQ ID.
On the basis of the technical scheme, when the command processing queue is generated by PCIe equipment with a plurality of functional units, the command processing module classifies commands in the command processing sequence according to SQ ID and Function ID.
On the basis of the technical scheme, when the command processing module reads the first two commands and the end data logical block address LBA of the previous command and the start LBA of the next command are continuous, the command processing module initiates data pre-reading requests of other commands to the data pre-reading module.
On the basis of the technical scheme, when data corresponding to the command exists in the data cache, the data pre-reading module directly transmits the data out of the data cache.
Compared with the prior art, the invention has the following advantages:
(1) the invention classifies the command processing queues according to different types of each command in the command processing queues, solves the problem that the pre-reading method fails due to mutual interference of command sequences in multiple SQs, and thereby avoids the problems that the data reading performance of the SSD is affected due to the failure of the pre-reading method, specifically, the command delay is increased, the data reading bandwidth is reduced, and the like.
(2) The invention forms a pre-reading command queue for storing the data corresponding to the command in the data cache according to the sequence, is convenient for managing the state of the data pre-reading operation and simultaneously maintains the context of the data pre-reading. Moreover, when a subsequent HOST data read command is processed, whether the command hits a cache can be judged directly by inquiring the data pre-read queue, so that the reading speed is increased, and the reading performance of sequential data is further improved.
(3) The pre-reading method greatly reduces the probability of loading the same data from NAND FLASH repeatedly by the HOST read command and the data pre-reading command, reduces the access to NAND FLASH, improves the data security and prolongs the life of NAND FLASH.
Drawings
Fig. 1 is a prior NVMe SSD data pre-read method.
Fig. 2 is a schematic diagram of how a read-ahead method of a conventional PCIe device having a Single functional unit (i.e., Single Function) is not effective.
Fig. 3 is a schematic diagram of how a read-ahead approach for a PCIe device with multiple functional units (i.e., Multi-Function) is not effective.
Fig. 4 is a schematic diagram of the read-ahead method of the PCIe device with Single functional unit (i.e., Single Function) according to the embodiment of the present invention.
FIG. 5 is a schematic diagram of the read-ahead method of a PCIe device (i.e., Multi-Function) having multiple functional units according to an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the figures and the embodiments.
The embodiment of the invention provides a pre-reading method for improving NVMe SSD sequential data reading performance, which comprises the following steps:
and reading the commands in the command sequence SQ according to different types of sequence data, forming a command processing sequence after arbitration, and classifying the commands according to the different types.
When the first n commands of the same type of commands are read, data corresponding to the other commands form a pre-read command queue in sequence from the (n + 1) th command in the type of commands, and are stored in a data cache for subsequent reading, wherein n is more than or equal to 2. Specifically, of the first n commands, the end LBA (Logical Block Address) of the previous command and the start LBA of the subsequent command are consecutive.
When data corresponding to the command exists in the data cache, the data is directly transmitted out of the data cache. The data reading command judges that the data corresponding to the command exists in the data cache by inquiring the pre-reading command queue.
Wherein when the command processing queue is generated by a PCIe device having a single functional unit, the commands in the command processing sequence are classified according to the SQ ID.
When the command processing queue is generated by a PCIe device having multiple functional units Function, the commands in the command processing sequence are classified according to the SQ ID and the Function ID.
The embodiment of the invention also provides a pre-reading system for improving the NVMe SSD sequential data reading performance, which comprises: the device comprises a command pre-fetching module, a command processing module and a data pre-reading module;
the command pre-fetching module is used for arbitrating commands in different types of sequence data reading command sequences SQ to form command processing sequences.
The command processing module is used for classifying the commands of the command processing sequence according to different types, and when the first n commands of the same type of commands are read, starting from the (n + 1) th command in the type of commands, data pre-reading requests of other commands are sent to the data pre-reading module, wherein n is larger than or equal to 2.
The data pre-reading module is used for sequentially forming a pre-reading command queue by the data corresponding to the same type of command according to different data pre-reading requests and storing the pre-reading command queue in the data cache.
When the command processing queue is generated by a PCIe device having a single functional unit, the command processing module classifies commands in the command processing sequence according to the SQ ID.
When the command processing queue is generated by a PCIe device having multiple functional units Function, the command processing module classifies commands in the command processing sequence according to the SQ ID and the Function ID.
Specifically, when the command processing module reads the first two commands and the end data logical block address LBA of the previous command and the start LBA of the next command are consecutive, the command processing module initiates data pre-read requests of the other commands to the data pre-read module. When data corresponding to the command exists in the data cache, the data pre-reading module directly transmits the data out of the data cache.
The command pre-fetching module obtains commands from the command sequences SQ according to a preset arbitration rule. In practical applications, since the NVMe protocol supports the creation of multiple SQ's, the HOST's application and system services can send commands to the SSD over different SQ's simultaneously. When a plurality of SQs have commands to wait for processing at the same time, the NVMe controller acquires the commands from the SQs according to a preset arbitration rule and sends the commands to the command processing module for processing, wherein the common rule is that the commands in the Admin SQ are processed preferentially, and the commands in the I/O SQ adopt a rotation scheduling mechanism. Therefore, the order in which the command processing module processes the commands is the sequence of the arbitrated commands of all the SQs, and the arbitration result depends on the preset arbitration mechanism and the current state of each SQ. For the NVMe SSD supporting Multi-Function, the command sequence received by the command processing module is first arbitrated between SQ inside each Function and then arbitrated between functions. The common rule is that the command in Admin SQ is processed preferentially in the Function, and the command in I/O SQ adopts a rotation scheduling mechanism; a round-robin scheduling mechanism is adopted between functions. The arbitration result depends on the pre-defined arbitration scheme and the state inside all SQs in all functions.
Example one
Referring to fig. 4, on the basis of the above technical solution, in this embodiment, a Single Function NVMe SSD is used to maintain four data pre-read queues, which can satisfy four sequential data pre-read threads at most simultaneously, and n takes a value of 2. In the figure, RR denotes a polling mechanism, Priority denotes Priority processing, each of SQ1, SQ2 and SQ3 has a sequential data read-ahead command sequence, and the other SQ is in an idle state, and the command processing module processes the arbitrated command processing queue according to SQ ID information of each command.
When the command processing module monitors that the commands A0 and A1 are a sequence of sequential data read commands from SQ1, a data read-ahead request is initiated to the data read-ahead module, data of the commands A2, A3 and … are loaded into a data cache in advance, and a read-ahead command Queue 0(Prefetch Queue 0) maintains a data read-ahead context from SQ 1.
When the command processing module monitors that the commands B0 and B1 are a sequence of commands from SQ2 sequential data reading, a data read-ahead request is initiated to the data read-ahead module, data of the commands B2, B3 and B … are loaded into a data cache in advance, and a data read-ahead context from SQ2 is maintained by a read-ahead command Queue 1(Prefetch Queue 1).
When the command processing module monitors that the commands C0 and C1 are a sequence of commands from SQ3 sequential data reading, a data read-ahead request is initiated to the data read-ahead module, data of the commands C2, C3 and C … are loaded into a data cache in advance, and a data read-ahead context from SQ3 is maintained by a read-ahead command Queue 2(Prefetch Queue 2).
It can be seen that when processing commands a2, B2, C2, A3, B3, and C3 … are started, these commands hit in different data caches and directly transfer HOST without getting from NAND FLASH. The read-ahead strategy decisions of SQ1, SQ2 and SQ3 and the data read-ahead information do not interfere with each other.
Example two
Referring to fig. 5, on the basis of the above technical solution, in this embodiment, a Multi-Function NVMe SSD is used to maintain four data pre-read queues, which can satisfy four sequential data pre-read threads at most simultaneously, and n takes a value of 2. In the figure, all functions 0_ SQ1, 1_ SQ1 and 2_ SQ1 have sequential data pre-read command sequences, and all other SQ are idle states, and the command processing module classifies the arbitrated command sequence according to the SQ ID and Function ID of each command.
When the command processing module monitors that the commands A0 and A1 are the sequence of the sequential data reading commands from Function 0_ SQ1, a data pre-reading request is initiated to the data pre-reading module, the data of A2, A3 and A … are loaded into the data cache in advance, and the data pre-reading context from SQ1 is maintained by the pre-reading command Queue 0(Prefetch Queue 0).
When the command processing module monitors that the commands B0 and B1 are a sequence of data reading commands from Function 1_ SQ1, a data pre-reading request is initiated to the data pre-reading module, the data of B2, B3 and B … are loaded into a data cache in advance, and a data pre-reading context from SQ2 is maintained by a pre-reading command Queue 1(Prefetch Queue 1).
When the command processing module monitors that the commands C0 and C1 are a sequence of sequential data read commands from Function 2_ SQ1, a data read-ahead request is initiated to the data read-ahead module, the data of C2, C3 and C … are loaded into the data cache in advance, and the read-ahead command Queue 2(Prefetch Queue 2) maintains a data read-ahead context from Function 2_ SQ 1.
It can be seen that when processing commands a2, B2, C2, A3, B3, and C3 … are started, these commands hit in different data caches and directly transfer HOST without getting from NAND FLASH. The read-ahead strategy judgment and the data read-ahead information of the Function 0_ SQ1, the Function 1_ SQ1 and the Function 2_ SQ1 do not interfere with each other.
Various modifications and variations of the embodiments of the present invention may be made by those skilled in the art, and they are also within the scope of the present invention, provided they are within the scope of the claims of the present invention and their equivalents.
What is not described in detail in the specification is prior art that is well known to those skilled in the art.
Claims (4)
1. A pre-reading method for improving NVMe SSD sequential data reading performance is characterized by comprising the following steps:
reading the commands in the command sequence SQ according to different types of sequence data, forming a command processing sequence after arbitration, and classifying the commands according to the different types;
when the first n commands of the same type of commands are read, sequentially forming a pre-read command queue by starting from the (n + 1) th command in the type of commands and storing data corresponding to the rest commands in a data cache for subsequent reading, wherein n is
2；
When the command processing sequence is generated by a PCIe device having a single functional unit, classifying commands in the command processing sequence according to the SQ ID;
when the command processing sequence is generated by a PCIe device with a plurality of Function units, classifying commands in the command processing sequence according to SQ ID and Function ID;
in the first n commands, the end data logical block address LBA of the previous command and the start LBA of the next command are consecutive.
2. The pre-read method for improving NVMe SSD sequential data read performance of claim 1, wherein: when data corresponding to the command exists in the data cache, the data is directly transmitted out of the data cache.
3. A pre-read system for improving NVMe SSD sequential data reading performance, comprising:
the command pre-fetching module is used for arbitrating commands in different types of sequence data reading command sequences SQ to form command processing sequences;
a command processing module for classifying the commands of the command processing sequence according to the different types, and initiating the number of the other commands to the data pre-reading module from the n +1 th command in the commands when the first n commands of the same command are readUpon a read-ahead request, where n
2；
The data pre-reading module is used for sequentially forming a pre-reading command queue by the data corresponding to the same type of command according to different data pre-reading requests and storing the pre-reading command queue in a data cache;
when the command processing sequence is generated by a PCIe device having a single functional unit, the command processing module classifies commands in the command processing sequence according to the SQ ID;
when the command processing sequence is generated by a PCIe device with a plurality of Function units, the command processing module classifies the commands in the command processing sequence according to the SQ ID and the Function ID;
when the command processing module reads the first two commands and the end data logical block address LBA of the previous command and the start LBA of the next command are continuous, the command processing module initiates data pre-reading requests of other commands to the data pre-reading module.
4. The pre-read system for improving NVMe SSD sequential data read performance of claim 3, wherein: when data corresponding to the command exists in the data cache, the data pre-reading module directly transmits the data out of the data cache.
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