CN107731145B - Efficient display gray level imaging method and device - Google Patents
Efficient display gray level imaging method and device Download PDFInfo
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Abstract
The invention discloses a high-efficiency gray imaging method of a display, which is a process of splitting binary pixel gray data with N bits in a frame memory into N bit planes according to the bits, equally dividing the N bit planes into M subspaces respectively, and transmitting the N multiplied by M subspaces to a display screen in a specific mode to form pixel gray; wherein, the pixel gray data is transmitted in turn by taking a subspace as a unit; the subspaces are transmitted in a random sequence; the gray data of the pixel transmitted to the display screen updates the brightness of the pixel immediately; the subspaces may be transmitted repeatedly within a frame or at intervals between adjacent frames, resulting in a higher refresh rate or more gray scale levels; the transmission interval constitutes the time weight of the subspace; if the bit plane is 1 bit, the pixel emits light when the gray data of the pixel is logic 1 or 0, and the pixel does not emit light when the gray data of the pixel is logic 0 or 1; if the bit plane is larger than 1 bit, the brightness of the pixel is proportional to the gray scale data of the pixel.
Description
Technical Field
The invention relates to the technical field of flat panel displays, in particular to a gray scale imaging method and device of a display.
Background
The gray imaging method and the device of the existing display generally follow the transmission sequence of pixel data from left to right and from top to bottom, the method is compatible with the operation sequence of a scanning electron gun in the traditional CRT display, the operation is simple, but a large amount of waiting time exists in the transmission of display data, and the transmission efficiency is reduced. The fractal scanning algorithm can improve scanning efficiency and eliminate waiting time, but the linearity of pixel gray scale generated by the conventional fractal scanning algorithm is insufficient, a contour line phenomenon exists, and user experience is influenced. The linearity can be improved by correcting the fractal scanning algorithm, but the correction algorithm in the prior art improves the linearity and reduces the scanning efficiency, and both the gray scale linearity and the scanning efficiency can not be considered.
Therefore, those skilled in the art are dedicated to develop a more effective gray scale imaging method and apparatus for a display, which on one hand breaks through the fixed transmission mode of the traditional display from left to right and from top to bottom, adopts a random transmission mode, effectively improves the resolution, frame rate and gray scale level of the display by reducing or eliminating the waiting time of display data transmission and changing the scanning algorithm, and on the other hand, considers the gray scale linearity and scanning efficiency and improves the display quality by changing the scanning random time sequence aiming at the problem of insufficient gray scale linearity of the existing fractal scanning algorithm.
Disclosure of Invention
In view of the above-mentioned defects in the prior art, the technical problem to be solved by the present invention is how to effectively improve the scanning efficiency of the display by improving the scanning algorithm, including parameters such as the display resolution, the frame rate, and the number of gray levels, and also considering the gray scale linearity.
In order to achieve the above object, the display data may be divided into subspaces and then transmitted randomly, and specifically, the gray scale imaging method for a display provided by the present invention includes a process of dividing binary pixel gray scale data having N bits in a frame memory into N bit planes by bits, equally dividing each of the N bit planes into M subspaces, and transmitting N × M subspaces to a display screen in a specific manner to form a pixel gray scale, where the bit planes are data sets composed of bits having the same weight in the pixel gray scale data, the subspaces are data sets of a plurality of consecutive pixels in the bit planes, each data in the data sets corresponds to one or more bits in the bit planes, and N, M is an integer greater than 1, and the specific manner satisfies the following conditions: (1) the pixel gray data is sequentially transmitted by taking a subspace as a unit; (2) the subspaces are transmitted in a random sequence, the random sequence means that the subspaces are not required to be transmitted from low order to high order or from high order to low order, and the transmission sequence can span different bit planes; (3) carrying out intra-frame repeated transmission or adjacent-frame interval transmission on the subspaces so as to form higher refreshing frequency or more gray levels; (4) the pixel gray data transmitted to the display screen immediately updates the luminous brightness of the pixel, wherein the luminous brightness comprises maximum brightness, minimum brightness and a brightness value between the maximum brightness and the minimum brightness, so that the luminous brightness of the pixel is in direct proportion to a transmission interval, and the transmission interval is equal to or approximately equal to the interval between the updating time of the previous pixel gray data and the updating time of the current pixel gray data; (5) the transmission interval forms a time weight of the subspace, the gray scale of the pixel belonging to the subspace is formed by the accumulation of the time weights, and the time weights determine the light-emitting time of the pixel in the time weights; (6) if the bit plane is 1 bit, the pixel emits light when the pixel gray scale data is logic 1 (or 0), and the pixel does not emit light when the pixel gray scale data is logic 0 (or 1); if the bit plane is larger than 1 bit, the brightness of the pixel is in direct proportion to the pixel gray scale data of the bit plane larger than 1; (7) after gray values formed by the time weight combination are arranged in an increasing mode, the ratio of two adjacent time weights is between 1.2:1 and 2.6: 1. Particularly, if the maximum ratio of two adjacent time weights reaches more than 2.6:1, the linearity will be affected, and if the ratio is lower than 1.2:1, the gray level number will be affected.
Further, a transient luminance value of the pixel when emitting light is kept constant within the time weight, the transient luminance value is determined by user setting and weight amplitude, the user setting is a highest target luminance which the user desires to reach and can set, if the bit plane is 1 bit, the weight amplitude is a luminance value which the pixel emits light when the pixel gray scale data is logic 1 (or 0), and if the bit plane is greater than 1 bit, the weight amplitude is a pixel luminance value which is proportional to the pixel gray scale value.
Further, the subspace contains at least one row of complete horizontal-oriented pixels or one column of complete vertical-oriented pixels, and accordingly the division of the subspace is expanded from a row or from a column.
Further, the specific manner further includes the following conditions: and clearing the transmission data of the specific subspace in the transmission process of the subspace so as to adjust the time weight value, so that the ratio of two adjacent weight values is 2:1 or close to 2: 1.
Further, the specific manner further includes the following conditions: and inserting waiting time in the transmission process of the subspace, thereby adjusting the time weight value to ensure that the ratio of two adjacent weight values is 2:1 or close to 2: 1.
Further, the number of gray values formed by combining the N time weights is 2NIs not less than 80%.
In addition, the invention also provides a gray imaging device of the display, which comprises a frame memory and a display driving circuit, wherein the frame memory is a static memory or a dynamic memory; the binary pixel gray scale data with N bits stored in the frame memory is divided into N bit planes according to the bits, each bit plane is equally divided into M subspaces, the display driving circuit transmits the NxM subspaces to a display screen in a specific mode and forms pixel gray scale, the bit planes are data sets formed by bits with the same weight in the pixel gray scale data, the subspaces are data sets of a plurality of continuous pixels in the bit planes, each data in the data sets corresponds to one or more bits in the bit planes, N, M is an integer larger than 1, and the specific mode meets the following conditions: (1) the pixel gray data is sequentially transmitted by taking a subspace as a unit; (2) the subspaces are transmitted in a random sequence, the random sequence means that the subspaces are not required to be transmitted from low order to high order or from high order to low order, and the transmission sequence can span different bit planes; (3) the subspaces may be transmitted repeatedly within a frame or at intervals between adjacent frames, resulting in a higher refresh rate or more gray scale levels; (4) the pixel gray data transmitted to the display screen immediately updates the luminous brightness of the pixel, wherein the luminous brightness comprises maximum brightness, minimum brightness and a brightness value between the maximum brightness and the minimum brightness, so that the luminous brightness of the pixel is in direct proportion to a transmission interval, and the transmission interval is equal to or approximately equal to the interval between the updating time of the previous pixel gray data and the updating time of the current pixel gray data; (5) the transmission interval forms a time weight of the subspace, the gray scale of the pixel belonging to the subspace is formed by the accumulation of the time weights, and the time weights determine the light-emitting time of the pixel in the time weights; (6) if the bit plane is 1 bit, the pixel emits light when the pixel gray scale data is logic 1 (or 0), and the pixel does not emit light when the pixel gray scale data is logic 0 (or 1); if the bit plane is larger than 1 bit, the brightness of the pixel is in direct proportion to the pixel gray scale data of the bit plane larger than 1; (7) after gray values formed by the time weight combination are arranged in an increasing mode, the ratio of two adjacent time weights is between 1.2:1 and 2.6: 1. Particularly, if the maximum ratio of two adjacent time weights reaches more than 2.6:1, the linearity will be affected, and if the ratio is lower than 1.2:1, the gray level number will be affected. The display driving circuit comprises a time sequence controller used for completing the transmission of the specific mode.
Further, the display is a display with an amorphous silicon, polycrystalline silicon or monocrystalline silicon substrate, a pixel driving circuit and a light emitting device are integrated on the substrate at the same time, the light emitting device is an active light emitting device or a light reflecting device, the active light emitting device is an organic electroluminescent device or an inorganic semiconductor light emitting device, the light reflecting device is a liquid crystal device or a digital micro-mirror device or a micro-mechanical device, and the pixel driving circuit is used for generating current or voltage required by the light emitting device.
Furthermore, the display has a data shift input functional module, and can shift and input the pixel gray scale data in series, the bit width of the data inputted by shifting is greater than or equal to 1 bit, and the input interface is a logic level interface or a low-voltage differential interface.
Further, the display has a row selection function module, which transmits the pixel data input by the display driving circuit to a specific row on the display panel, so as to complete the random transmission of the subspace, and the row selection function module is completed by a row decoder or a subspace sequence generator integrated in the display driving circuit.
The gray imaging method and the gray imaging device of the display greatly improve the transmission efficiency of the display, effectively improve the scanning efficiency of the display by changing the scanning algorithm under the condition of keeping the same external hardware as the prior art, and simultaneously give consideration to the gray linearity and reduce the realization cost by changing the parameters such as the display resolution, the frame rate, the gray level number and the like.
The conception, the specific structure and the technical effects of the present invention will be further described with reference to the accompanying drawings to fully understand the objects, the features and the effects of the present invention.
Drawings
FIG. 1 is a preferred embodiment of the present invention of the storage of images in a frame memory;
FIG. 2 is a preferred embodiment of a subspace scanning order for a frame of image data transmission according to the present invention;
FIG. 3 is a diagram of another preferred embodiment of a subspace scanning order for a frame of image data transmission according to the present invention;
FIG. 4 is a diagram of a subspace scanning order for a frame of image data transmission in accordance with yet another preferred embodiment of the present invention;
FIG. 5 is a subspace scanning order for a frame of image data transmission in accordance with yet another preferred embodiment of the present invention;
FIG. 6 is a preferred embodiment of a gray scale imaging arrangement for a display according to the present invention;
FIG. 7 is another preferred embodiment of a gray scale imaging arrangement for a display according to the present invention;
FIG. 8 is a preferred embodiment of a display in a gray scale imaging arrangement for a display according to the present invention;
FIG. 9 is another preferred embodiment of a display in a gray scale imaging arrangement for a display according to the present invention;
fig. 10 is a schematic diagram of a gray scale imaging device for a display according to another preferred embodiment of the present invention.
Detailed Description
The technical contents of the preferred embodiments of the present invention will be more clearly and easily understood by referring to the drawings attached to the specification. The present invention may be embodied in many different forms of embodiments and the scope of the invention is not limited to the embodiments set forth herein.
In the drawings, structurally identical elements are represented by like reference numerals, and structurally or functionally similar elements are represented by like reference numerals throughout the several views. The size and thickness of each component shown in the drawings are arbitrarily illustrated, and the present invention is not limited to the size and thickness of each component. The thickness of the components may be exaggerated where appropriate in the figures to improve clarity.
The first embodiment is set forth below:
this embodiment describes a gray scale imaging method for a display:
first, binary pixel gray scale data with N bits in a frame memory is split into N bit planes according to bits, and each of the N bit planes is equally divided into M subspaces, where N, M are integers greater than 1, as shown in fig. 1, for a frame of image containing N bits of pixel data, each bit plane is a data set composed of bits with the same weight in the pixel gray scale data, each bit plane has M subspaces, and the subspaces are data sets of several consecutive pixels in the bit plane, in a preferred embodiment, each data in the data set is 1 bit, in another preferred embodiment, each data in the data set is T bits, and T is greater than 1 and less than or equal to N.
Then, the N × M subspaces are transferred to the display screen in a certain manner, and pixel gradations are formed. The specific mode satisfies the following conditions: (1) the pixel gray data is sequentially transmitted by taking a subspace as a unit; (2) the subspaces are transmitted in a random sequence, the random sequence means that the subspaces are not required to be transmitted from low order to high order or from high order to low order, and the transmission sequence can span different bit planes; (3) carrying out intra-frame repeated transmission or adjacent-frame interval transmission on the subspaces so as to form higher refreshing frequency or more gray levels; (4) the pixel gray data transmitted to the display screen immediately updates the luminous brightness of the pixel, wherein the luminous brightness comprises maximum brightness, minimum brightness and a brightness value between the maximum brightness and the minimum brightness, so that the luminous brightness of the pixel is in direct proportion to a transmission interval, and the transmission interval is equal to or approximately equal to the interval between the updating time of the previous pixel gray data and the updating time of the current pixel gray data; (5) the transmission interval forms a time weight of the subspace, the gray scale of the pixel belonging to the subspace is formed by the accumulation of the time weights, and the time weights determine the light-emitting time of the pixel in the time weights; (6) if the bit plane is 1 bit, the pixel emits light when the pixel gray scale data is logic 1 (or 0), and the pixel does not emit light when the pixel gray scale data is logic 0 (or 1); if the bit plane is larger than 1 bit, the brightness of the pixel is in direct proportion to the pixel gray scale data of the bit plane larger than 1; (7) after gray values formed by the time weight combination are arranged in an increasing mode, the ratio of two adjacent time weights is between 1.2:1 and 2.8: 1.
As a preferred example of data transmission, as shown in fig. 2, the abscissa is transmission time, the ordinate is subspace number (there are 32 subspaces in the figure, and the number is 0 to 31), each point in the coordinate corresponds to a transmission point of one subspace, the length of each time weight is the part from the transmission point of one subspace to the transmission point of the next subspace, each subspace in the example can form 8 time weights, which respectively correspond to unit times of 1, 2, 4, 9, 16, 32, 64, and 128, and each time weight corresponds to a proportional waiting time, so that the number of gray levels formed by combining the examples is 240. The transmission is of a random nature and does not follow a row-by-row and column-by-column transmission order. The preferred bit plane is 1 bit.
As another preferred example of data transmission, as shown in fig. 3, the abscissa is transmission time, the ordinate is subspace number (in the figure, there are 24 subspaces, and the number is 0 to 23), each point in the coordinates corresponds to a transmission point of one subspace, the length of each time weight is the part from the transmission point of one subspace to the transmission point of the next subspace, each subspace in the example can form 8 time weights, which respectively correspond to unit times of 1, 2, 3, 6, 12, 24, 48, and 96, and since each time weight corresponds to a proportional waiting time, the number of gray levels that the example can combine to form is 214 levels. The transmission is of a random nature and does not follow a row-by-row and column-by-column transmission order. The preferred bit plane is 1 bit.
As another preferred example of data transmission, as shown in fig. 4, the abscissa is transmission time, the ordinate is subspace number (48 subspaces in the figure, the number is 0 to 47), each point in the coordinate corresponds to a transmission point of one subspace, the length of each time weight is the part from the transmission point of one subspace to the transmission point of the next subspace, each subspace in the example can form 8 time weights, which respectively correspond to unit times of 1, 2, 4, 8, 15, 30, 60, 120, and 240, and each time weight corresponds to a proportional waiting time, so that the number of gray levels formed by combining the example is 478 levels. The transmission is of a random nature and does not follow a row-by-row and column-by-column transmission order. The preferred bit plane is 1 bit.
As another preferred example, similar transmission coordinates (not shown) can be calculated according to fig. 2, and the gray-scale weights are: 1.2, 4, 8, 15, 30, 60, 120, 240, 480; the preferred bit plane is 1 bit.
As another preferred example, similar transmission coordinates (not shown) can be calculated according to fig. 2, and the gray-scale weights are: 1.2, 4, 8, 16, 32, 63, 126, 252, 504, 1008; the preferred bit plane is 1 bit.
As another preferred example, similar transmission coordinates (not shown) can be calculated according to fig. 2, and the gray-scale weights are: 1.2, 4, 8, 16, 32, 63, 126, 252, 504, 1008, 2006. The preferred bit plane is 1 bit.
As another preferred example of data transmission, as shown in fig. 5, the horizontal direction of the table is transmission time, the vertical direction of the table is subspace number (3 subspaces in the figure, number is 0 to 2), each point in the coordinate corresponds to a transmission point of one subspace, the length of each time weight is the part from the transmission point of one subspace to the transmission point of the next subspace, each subspace in this example can form 4 time weights, which respectively correspond to unit times of 1, 2, 4, and 8, wherein the time weight with unit time of 1 corresponds to two transmission points, which are respectively a transmission point of a bit plane of 1 bit and a transmission point of a bit plane of T bit (T is greater than 1 and less than or equal to N), so that the example can form a gray scale number of 16 × 2 by combinationT. The transmission is of a random nature and does not follow a row-by-column basisThe order of transmission of (a).
For the above preferred example, further more subspace transmission points or cancellation subspace transmission points may be inserted, so that the subspace of one frame image transmission is not necessarily exactly equal to N × M, thereby forming a higher refresh frequency or more gray scale levels to adjust the linearity degree of the gray scale and the scanning efficiency.
Further, more gray scale weight combinations can be calculated according to the condition that the ratio of two adjacent time weights is between 1.2:1 and 2.8:1, which is not exhaustive in the embodiment.
The second embodiment is set forth below:
this example is substantially the same as the first embodiment, with the following features:
further, a transient luminance value of the pixel when emitting light is kept constant within the time weight, the transient luminance value is determined by user setting and weight amplitude, the user setting is a highest target luminance which the user desires to reach and can set, if the bit plane is 1 bit, the weight amplitude is a luminance value which the pixel emits light when the pixel gray scale data is logic 1 (or 0), and if the bit plane is greater than 1 bit, the weight amplitude is a pixel luminance value which is proportional to the pixel gray scale value.
Further, the subspace contains at least one row of complete horizontal-oriented pixels or one column of complete vertical-oriented pixels, and accordingly the division of the subspace is expanded from a row or from a column. When the subspace contains at least one row of complete horizontally oriented pixels, the division of the subspace is spread out from the row direction, the number of subspaces being equal to the number of rows of the display divided by the number of rows contained by the subspace. When the subspace contains at least one complete column of pixels in the vertical direction, the division of the subspace is spread out from the column direction, and the number of subspaces is equal to the number of columns of the display divided by the number of columns contained in the subspace.
Further, the specific manner further includes the following conditions: and clearing the transmission data of the specific subspace in the transmission process of the subspace so as to adjust the time weight value, so that the ratio of two adjacent weight values is 2:1 or close to 2: 1. As a preferred example, the gray scale weight is: 1:2:4:8 (9: 16:32:64: 128; the 9 in the parentheses indicates that the gray scale weight of the subfield is 9, but after the gray scale is transmitted to the 8 th weight unit, the subspace data in the 9 weight units is cleared, and the actual effective time of the subfield is still 8 weight units, so that the linearity of the subfield is corrected.
Further, the specific manner further includes the following conditions: and inserting waiting time in the transmission process of the subspace, thereby adjusting the time weight value to ensure that the ratio of two adjacent weight values is 2:1 or close to 2: 1. As a preferred example, the gray scale weight is: 1:2:4:8:16(15):32(30):64(60):128(120):256 (240); the value in parentheses represents the original gray scale weight of the subspace, but after the current weight unit is transmitted, the current weight is expanded by inserting the waiting time, thereby correcting the linearity.
Further, the number of gray values formed by combining the N time weights is 2NThe ratio of (2) is not less than 80%, and further limits the gray scale weight combination, so that the transmission efficiency and the linearity of the gray scale value are further improved.
The third embodiment is set forth below:
this embodiment describes a gray-scale imaging device for a display, and fig. 6 shows a preferred example, and the device includes a frame memory 103 and a display driving circuit 102, wherein the display driving circuit 102 can store and read out the contents of the frame memory 103. The image generation platform 100 is a computer platform capable of generating a video signal, the video signal is transmitted to the display driving circuit 102, the display driving circuit 102 stores the video signal in the frame memory 103, the frame memory 103 is a static memory or a dynamic memory, the display driving circuit 102 stores N bit planes into the frame memory 103, each bit plane has M subspaces, and N × M subspaces are read out from the frame memory 103 and transmitted to the display 104 in a specific manner to form pixel gray, the bit planes are data sets composed of bits with the same weight in the pixel gray data, the subspaces are data sets of a plurality of continuous pixels in the bit planes, each data in the data sets corresponds to one or more bits in the bit planes, n, M are integers greater than 1, and the specific mode satisfies the following condition: (1) the pixel gray data is sequentially transmitted by taking a subspace as a unit; (2) the subspaces are transmitted in a random sequence, the random sequence means that the subspaces are not required to be transmitted from low order to high order or from high order to low order, and the transmission sequence can span different bit planes; (3) the subspaces may be transmitted repeatedly within a frame or at intervals between adjacent frames, resulting in a higher refresh rate or more gray scale levels; (4) the pixel gray data transmitted to the display screen immediately updates the luminous brightness of the pixel, wherein the luminous brightness comprises maximum brightness, minimum brightness and a brightness value between the maximum brightness and the minimum brightness, so that the luminous brightness of the pixel is in direct proportion to a transmission interval, and the transmission interval is equal to or approximately equal to the interval between the updating time of the previous pixel gray data and the updating time of the current pixel gray data; (5) the transmission interval forms a time weight of the subspace, the gray scale of the pixel belonging to the subspace is formed by the accumulation of the time weights, and the time weights determine the light-emitting time of the pixel in the time weights; (6) if the bit plane is 1 bit, the pixel emits light when the pixel gray scale data is logic 1 (or 0), and the pixel does not emit light when the pixel gray scale data is logic 0 (or 1); if the bit plane is larger than 1 bit, the brightness of the pixel is in direct proportion to the pixel gray scale data of the bit plane larger than 1; (7) after gray values formed by the time weight combination are arranged in an increasing mode, the ratio of two adjacent time weights is between 1.2:1 and 2.8: 1. The display driving circuit includes a timing controller 105 for completing the transmission of the specific mode. Further, the dynamic memory is a single-rate synchronous dynamic random access memory or a double-rate synchronous dynamic random access memory, and the static memory is a memory in which data does not disappear after being written and does not need to be refreshed.
Fig. 7 shows another preferred example, the apparatus includes a frame memory 103 and a display driving circuit 102, the frame memory 103 is integrated in an image generation platform 100, the image generation platform 100 is a computer platform capable of generating a video signal, and the video signal is transmitted to the display driving circuit 102. The frame memory 103 is a static memory or a dynamic memory, and stores N bit planes obtained by splitting binary pixel gray scale data with N bits by bits through the image generation platform 100, each bit plane contains M equally divided subspaces, the display driving circuit 102 transmits N × M subspaces to the display 104 in a specific manner and forms pixel gray scale, the bit planes are data sets composed of bits with the same weight in the pixel gray scale data, the subspaces are data sets of several continuous pixels in the bit plane, each data in the data sets corresponds to one or more bits in the bit plane, the N, M is an integer greater than 1, and the specific manner satisfies the following conditions: (1) the pixel gray data is sequentially transmitted by taking a subspace as a unit; (2) the subspaces are transmitted in a random sequence, the random sequence means that the subspaces are not required to be transmitted from low order to high order or from high order to low order, and the transmission sequence can span different bit planes; (3) the subspaces may be transmitted repeatedly within a frame or at intervals between adjacent frames, resulting in a higher refresh rate or more gray scale levels; (4) the pixel gray data transmitted to the display screen immediately updates the luminous brightness of the pixel, wherein the luminous brightness comprises maximum brightness, minimum brightness and a brightness value between the maximum brightness and the minimum brightness, so that the luminous brightness of the pixel is in direct proportion to a transmission interval, and the transmission interval is equal to or approximately equal to the interval between the updating time of the previous pixel gray data and the updating time of the current pixel gray data; (5) the transmission interval forms a time weight of the subspace, the gray scale of the pixel belonging to the subspace is formed by the accumulation of the time weights, and the time weights determine the light-emitting time of the pixel in the time weights; (6) if the bit plane is 1 bit, the pixel emits light when the pixel gray scale data is logic 1 (or 0), and the pixel does not emit light when the pixel gray scale data is logic 0 (or 1); if the bit plane is larger than 1 bit, the brightness of the pixel is in direct proportion to the pixel gray scale data of the bit plane larger than 1; (7) after gray values formed by the time weight combination are arranged in an increasing mode, the ratio of two adjacent time weights is between 1.2:1 and 2.8: 1. The display driving circuit includes a timing controller 105 for completing the transmission of the specific mode. Further, the dynamic memory is a single-rate synchronous dynamic random access memory or a double-rate synchronous dynamic random access memory, and the static memory is a memory in which data does not disappear after being written and does not need to be refreshed.
The fourth embodiment is set forth below:
the embodiment is basically the same as the third embodiment, and is characterized in that:
further, as shown in fig. 8, as a preferred example of a display, the display 104 is a display having an amorphous silicon, polysilicon or single crystal silicon substrate on which a pixel driving circuit 303 and a light emitting device 310 are integrated at the same time, the light emitting device 310 is an active light emitting device or a light reflecting device, the active light emitting device is an organic electroluminescent device or an inorganic semiconductor light emitting device, the light reflecting device is a liquid crystal device or a digital micromirror device or a micromechanical device, and the pixel driving circuit is used for generating a current or a voltage required for the light emitting device.
Further, the display 104 has a data shift input function 301, which can serially shift input of pixel gray scale data, where the serial shift input refers to input of 1 bit data or multi-bit input of more than 1 bit data, the input interface 501 is a logic level interface or a low voltage differential interface, the logic level interface is a transmission interface for indicating logic high or logic low by level, and the low voltage differential interface is a transmission interface for indicating logic high or logic low by differential signals. Further, the serial shift direction may be from left pixel to right pixel or from right pixel to left pixel of the subspace.
Further, the display 104 has a row selection function module 302, which transmits the pixel data inputted by the display driving circuit to a specific row on the display panel, so that the random transmission of the sub-space can be completed.
Further, as another preferred example of the display, as shown in fig. 9, the row selection function module 302 may be implemented by a row decoder 320 integrated in the display driving circuit 104, and the row decoder 320 is configured to select a specific row or a specific subspace according to an externally input row signal, write an input pixel data signal into the specific row, and implement gray scale value display. The signals after the row decoder 320 are fed to a row driver 325, which row driver 325 is arranged to amplify the row decoder signals for driving a particular row or a particular subspace.
Further, as a preferred example of another display, as shown in fig. 10, the row selecting function module 302 may also be implemented by a subspace sequence generator 321 integrated in the display driving circuit 104, where the subspace sequence generator 321 is independent of the externally input row signal, and can independently and automatically generate a random sequence of subspaces to write the input pixel data signal into a specific row, so as to implement gray scale value display. The row signals output by the subspace sequencer 321 are coupled to a row driver 325, which row driver 325 is used to amplify the row decoder signals for driving a particular row or a particular subspace. The subspace sequence generator 321 may be implemented by an on-chip integrated register, an on-chip integrated ram memory, an on-chip integrated rom.
Further, rows and columns may be interchanged, i.e., rows may be used instead of columns, or columns may be used instead of rows.
The foregoing detailed description of the preferred embodiments of the invention has been presented. It should be understood that numerous modifications and variations could be devised by those skilled in the art in light of the present teachings without departing from the inventive concepts. Therefore, the technical solutions available to those skilled in the art through logic analysis, reasoning and limited experiments based on the prior art according to the concept of the present invention should be within the scope of protection defined by the claims.
Claims (10)
1. An efficient gray imaging method for a display comprises the steps of splitting binary pixel gray data with N bits in a frame memory into N bit planes according to the bits, equally dividing the N bit planes into M subspaces respectively, and transmitting the N multiplied by M subspaces to a display screen in a specific mode to form pixel gray, wherein the bit planes are data sets formed by bits with the same weight in the pixel gray data, the subspaces are data sets of a plurality of continuous pixels in the bit planes, each data in the data sets corresponds to one or more bits in the bit planes, N, M is an integer greater than 1, and the specific mode satisfies the following conditions: (1) the pixel gray data is sequentially transmitted by taking a subspace as a unit; (2) the subspaces are transmitted in a random sequence; (3) carrying out intra-frame repeated transmission or adjacent-frame interval transmission on the subspaces so as to form higher refreshing frequency or more gray levels; (4) the pixel gray data transmitted to the display screen immediately updates the luminous brightness of the pixel, wherein the luminous brightness comprises maximum brightness, minimum brightness and a brightness value between the maximum brightness and the minimum brightness, so that the luminous brightness of the pixel is in direct proportion to a transmission interval, and the transmission interval is equal to or approximately equal to the interval between the updating time of the previous pixel gray data and the updating time of the current pixel gray data; (5) the transmission interval forms a time weight of the subspace, the gray scale of the pixel belonging to the subspace is formed by the accumulation of the time weights, and the time weights determine the light-emitting time of the pixel in the time weights; (6) if the bit plane is 1 bit, the pixel emits light when the pixel gray scale data is logic 1 and does not emit light when the pixel gray scale data is logic 0, or the pixel emits light when the pixel gray scale data is logic 0 and does not emit light when the pixel gray scale data is logic 1; if the bit plane is larger than 1 bit, the brightness of the pixel is in direct proportion to the pixel gray scale data of the bit plane larger than 1; (7) after gray values formed by the time weight combination are arranged in an increasing mode, the ratio of two adjacent time weights is between 1.2:1 and 2.8: 1.
2. The method of claim 1, wherein the transient luminance value of the pixel during light emission is kept constant within the time weight, the transient luminance value is determined by user setting and weight magnitude, the user setting is the highest target luminance that the user wants to achieve and can set, if the bit plane is 1 bit, the weight magnitude is the luminance value that the pixel reaches when the gray level data of the pixel is logic 1 or 0, and if the bit plane is greater than 1 bit, the weight magnitude is the luminance value of the pixel proportional to the gray level value of the pixel.
3. Method for greyscale imaging of a display as claimed in claim 1, characterized in that said subspace contains at least one row of complete horizontally oriented pixels or one column of complete vertically oriented pixels, the division of the subspace correspondingly being expanded from a row or from a column.
4. The method for gray scale imaging of a display of claim 1, wherein said specific manner further comprises the following condition: and clearing the transmission data of the specific subspace in the transmission process of the subspace so as to adjust the time weight value, so that the ratio of two adjacent weight values is 2:1 or close to 2: 1.
5. The method for gray scale imaging of a display of claim 1, wherein said specific manner further comprises the following condition: and inserting waiting time in the transmission process of the subspace, thereby adjusting the time weight value to ensure that the ratio of two adjacent weight values is 2:1 or close to 2: 1.
6. The method of claim 1, wherein the N time weights combine the number of gray scale values formed with 2NIs not less than 80%.
7. The efficient gray imaging device for the display is characterized by comprising a frame memory and a display driving circuit, wherein the frame memory is a static memory or a dynamic memory; the binary pixel gray scale data with N bits stored in the frame memory is divided into N bit planes according to the bits, each bit plane is equally divided into M subspaces, the display driving circuit transmits the NxM subspaces to a display screen in a specific mode and forms pixel gray scale, the bit planes are data sets formed by bits with the same weight in the pixel gray scale data, the subspaces are data sets of a plurality of continuous pixels in the bit planes, each data in the data sets corresponds to one or more bits in the bit planes, N, M is an integer larger than 1, and the specific mode meets the following conditions: (1) the pixel gray data is sequentially transmitted by taking a subspace as a unit; (2) the subspaces are transmitted in a random sequence; (3) carrying out intra-frame repeated transmission or adjacent-frame interval transmission on the subspaces so as to form higher refreshing frequency or more gray levels; (4) the pixel gray data transmitted to the display screen immediately updates the luminous brightness of the pixel, wherein the luminous brightness comprises maximum brightness, minimum brightness and a brightness value between the maximum brightness and the minimum brightness, so that the luminous brightness of the pixel is in direct proportion to a transmission interval, and the transmission interval is equal to or approximately equal to the interval between the updating time of the previous pixel gray data and the updating time of the current pixel gray data; (5) the transmission interval forms a time weight of the subspace, the gray scale of the pixel belonging to the subspace is formed by the accumulation of the time weights, and the time weights determine the light-emitting time of the pixel in the time weights; (6) if the bit plane is 1 bit, the pixel emits light when the pixel gray scale data is logic 1 and does not emit light when the pixel gray scale data is logic 0, or the pixel emits light when the pixel gray scale data is logic 0 and does not emit light when the pixel gray scale data is logic 1; if the bit plane is larger than 1 bit, the brightness of the pixel is in direct proportion to the pixel gray scale data of the bit plane larger than 1; (7) after gray values formed by the time weight combination are arranged in an increasing mode, the ratio of two adjacent time weights is between 1.2:1 and 2.8: 1; the display driving circuit comprises a time sequence controller used for completing the transmission of the specific mode.
8. The gray-scale imaging apparatus for a display according to claim 7, wherein the display is a display having an amorphous silicon, polysilicon or single crystal silicon substrate, the substrate is integrated with both a pixel driving circuit and a light emitting device, the light emitting device is an active light emitting device or a light reflecting device, the active light emitting device is an organic electroluminescent device or an inorganic semiconductor light emitting device, the light reflecting device is a liquid crystal device or a digital micromirror device or a micromechanical device, and the pixel driving circuit is used for generating a current or a voltage required for the light emitting device.
9. The display gray scale imaging device of claim 7, wherein the display has a data shift input function module, the data shift input function module serially shifts the pixel gray scale data, the bit width of the shifted input data is greater than or equal to 1 bit, and the input interface is a logic level interface or a low voltage differential interface.
10. The gray scale imaging apparatus for display claimed in claim 7, wherein the display has a row selection function module for transferring the pixel data inputted from the display driving circuit to a specific row on the display panel so as to perform the random transfer of the sub-space, the row selection function module being performed by a row decoder integrated in the display driving circuit or a sub-space sequence generator.
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