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CN105118818B - 一种方形扁平无引脚封装结构的功率模块 - Google Patents

一种方形扁平无引脚封装结构的功率模块 Download PDF

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Publication number
CN105118818B
CN105118818B CN201510427669.3A CN201510427669A CN105118818B CN 105118818 B CN105118818 B CN 105118818B CN 201510427669 A CN201510427669 A CN 201510427669A CN 105118818 B CN105118818 B CN 105118818B
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China
Prior art keywords
chip
power
lead frame
metal
driver
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CN201510427669.3A
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CN105118818A (zh
Inventor
刘斯扬
王宁
魏家行
刘超
孙伟锋
陆生礼
时龙兴
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Southeast University
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Southeast University
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Priority to CN201510427669.3A priority Critical patent/CN105118818B/zh
Publication of CN105118818A publication Critical patent/CN105118818A/zh
Priority to US15/576,850 priority patent/US10056313B2/en
Priority to PCT/CN2016/072692 priority patent/WO2017012329A1/zh
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Publication of CN105118818B publication Critical patent/CN105118818B/zh
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Abstract

一种方形扁平无引脚封装结构的功率模块，用于抑制功率模块局部温度过高，包括：绝缘树脂、驱动芯片、功率芯片和金属电极触点，驱动芯片、功率芯片和金属电极触点按照既定设计电路并通过金属引线电连接，在绝缘树脂的底层设有用于功率芯片散热的金属散热盘和驱动芯片引线框架，在金属散热盘上设有功率芯片引线框架，所述功率芯片设在功率芯片引线框架上且功率芯片的漏与金属散热盘电连接，在驱动芯片引线框架上设有驱动芯片，所述金属散热盘在底层的驱动芯片引线框架及金属电极触点占据的以外区域延伸，在驱动芯片引线框架的下方设有金属支柱，金属散热盘还延伸进入驱动芯片引线框架下方的底层区域。

Description

一种方形扁平无引脚封装结构的功率模块
技术领域
本发明涉及一种方形扁平无引脚封装结构的功率模块，尤其涉及改进优化方形扁平无引脚封装结构层的高度差，使得功率模块整体散热速率加快，抑制功率模块局部温度过高，延缓局部器件的老化速度，保证模块整体使用寿命。
背景技术
在半导体功率模块日益小型化的趋势之下，半导体功率模块封装工艺的封装尺寸要求也越来越小型化，功率方形扁平无引线封装这种表面贴装半导体封装技术应运而生，既能实现在目标尺寸下多个分立封装器件才能够实现的电路功能，又因为其去除了非必要的电阻和电感，从而在电特性方面，与封装尺寸相同的分立器件相比，具有更高的功率密度；功率模块的封装以其高可靠性、低损耗、低开发成本的优势正赢得越来越大的市场。
对于实现方形扁平无引脚封装结构的功率模块来说，由于其中功率芯片的热损耗远远大于驱动芯片的热损耗，如果将功率芯片的散热和驱动芯片相同对待的话，会减小封装空间的利用率，同时造成局部温度过高，部分芯片在未达到产品寿命之前就已老化，从而影响到产品的可靠性，缩短产品寿命甚至造成产品失效。
围绕方形扁平无引脚封装结构的功率模块，通过金属支柱来抬高驱动芯片引线框架所在的结构层，保持功率芯片所在的结构层高度相对不变，同时将功率芯片引线框架和金属散热盘伸入驱动芯片引线框架下方区域，可以增大功率芯片所对应金属散热盘的面积，加快热功耗较大的功率芯片的散热速率。
同时，由于将热损耗量较大的功率芯片所对应的铜框架和金属散热盘的面积增大，使得功率芯片的内部热功耗的主要散热途径分布面积更大，对于封装模块整体而言，温度分布更加均匀，避免了封装模块温度局部过高，提高了产品可靠性。另外，由于结构层的高低优化，金属电极引线两端存在高度差，可以很好地减少由于重力作用而导致的金属电极引线的塌陷，进而减少电路短路问题的发生，减小了工艺上的难度与制造成本。
发明内容
本发明提供一种方形扁平无引脚封装结构的功率模块，能够加快封装模块的散热速度，减小局部区域之间悬殊的温度差，使得温度分布趋向均匀化。
为实现上述目的，本发明提供以下技术方案：
一种方形扁平无引脚封装结构的功率模块，包括：绝缘树脂、驱动芯片、功率芯片和金属电极触点，驱动芯片、功率芯片和金属电极触点按照既定设计电路并通过金属引线电连接，在绝缘树脂的底层设有用于功率芯片散热的金属散热盘和驱动芯片引线框架，在金属散热盘上设有功率芯片引线框架，所述功率芯片设在功率芯片引线框架上且功率芯片的漏极与金属散热盘电连接，在所述驱动芯片引线框架上设有驱动芯片，所述金属散热盘在底层的驱动芯片引线框架及金属电极触点占据的以外区域延伸以布满底层的驱动芯片引线框架及金属电极触点占据的以外区域，在驱动芯片引线框架的下方设有金属支柱，所述金属支柱立于底层并将驱动芯片引线框架抬离底层，所述金属散热盘还延伸进入驱动芯片引线框架下方的底层区域。
与现有技术相比，本发明具有以下优点：
(1)、本发明所述的功率模块的方形扁平无引脚封装结构，驱动芯片引线框架3通过下方四角处的四个金属支柱4提升一定高度，将部分功率芯片引线框架2和对应的金属散热盘6伸入至驱动芯片引线框架3下方，增大了热损耗较多的功率芯片30的金属散热盘面积，极大地加快了封装模块整体的散热速率；同时，金属散热盘6较大限度地利用封装模块底部面积，使得模块散热可以占用封装底部较多区域，进而避免了封装模块局部温差过于悬殊，在加快散热速率的同时减小了局部器件老化速率，保证了器件寿命。如附图7和附图8，分别是改进结构和原结构在相同环境下，功率芯片赋值相同功率情况下的散热分析。如图7所示，改进结构中最高温度为123.2℃，最低为53.348℃，如图8所示，原结构中最高温度为131.8℃，最低为43.796℃；显然图7所示改进结构模块区域之间的温度差小于图8所示原模块，改进结构功率模块整体温度分布更加趋向均匀化，避免局部温度过高而导致器件老化速率加快，从而延长了功率模块整体的使用寿命。在图7和图8所示模块的高温区域，图7所示改进结构模块的温度小于图8所示功率模块的温度，因此图7所示改进结构模块散热效率也优于图8所示功率模块。
(2)、本发明所述功率模块的方形扁平无引脚封装结构驱动芯片引线框架3和功率芯片引线框架2之间存在高度差，这样使得键合跨度长的金属引线张力增大，从而克服由其重力引起的塌陷问题，进而减少由于金属引线塌陷而导致的模块整体短路现象的产生。同时，在封装结构中设计有搭线基岛5，作为过长金属引线之间的中继桥接媒介，使得较长金属引线变成多条较短金属引线的集合，而键合较短的金属引线可以通过本身的张力克服导致其塌陷的重力，也起到了减少由金属引线塌而导致模块整体短路现象的作用。综上，本发明提供的结构减小了工艺上的搭线难度，节约了制造成本。
(3)、在规定的封装空间内，若通过分立器件实现和本发明功率模块相同的电路功能，则需要较多个数的分立器件，且规定的封装空间可能容纳不了所需分立器件个数，从而导致通过分立器件实现不了电路功能，因此，相比于分立器件，本发明所述的功率模块能够比较容易地在更小的体积尺寸条件下实现电路功能，成本较低；此外，本发明所述功率模块将多芯片封装成功率模块整体，去除了非必要的连接电阻和电感，增大集成密度的同时，也减小了寄生和功率损耗。
附图说明
图1为本发明提供的一种功率模块的方形扁平无引脚封装结构实例的无引线三维视图。
图2为本发明提供的一种功率模块的方形扁平无引脚封装结构实例的俯视示意图。
图3为本发明提供的一种功率模块的方形扁平无引脚封装结构实例沿A-a截面的剖面图。
图4为本发明提供的一种功率模块的方形扁平无引脚封装结构实例沿B-b截面的剖面图。
图5为本发明提供的一种功率模块的方形扁平无引脚封装结构实例沿C-c截面的剖面图。
图6为本发明提供的一种功率模块的方形扁平无引脚封装结构实例在D-d截面的剖面图。
图7为环境温度为20℃，功率芯片附加功率的情况下，改进结构功率模块散热分析图。
图8为本发明是在环境温度为20℃，功率芯片附加与图7模块相同功率的情况下，原结构模块散热分析图。
其中，1、绝缘树脂；2、功率芯片引线框架；3、驱动芯片引线框架；4、金属支柱；5、搭线基岛；6、金属散热盘；7、导电焊料；8、银浆；9、胶带；20、金属电极触点；30、功率芯片；31、驱动芯片；101、铜引线；102金引线。
具体实施方式
一种方形扁平无引脚封装结构的功率模块，包括：绝缘树脂1、驱动芯片31、功率芯片30和金属电极触点20，驱动芯片31、功率芯片30和金属电极触点20按照既定设计电路并通过金属引线电连接，在绝缘树脂1的底层设有用于功率芯片散热的金属散热盘6和驱动芯片引线框架3，在金属散热盘6上设有功率芯片引线框架2，所述功率芯片30设在功率芯片引线框架2上且功率芯片30的漏与金属散热盘6电连接，在所述驱动芯片引线框架3上设有驱动芯片31，所述金属散热盘6在底层的驱动芯片引线框架3及金属电极触点20占据的以外区域延伸以布满底层的驱动芯片引线框架3及金属电极触点20占据的以外区域，在驱动芯片引线框架3的下方设有金属支柱4，所述金属支柱4立于底层并将驱动芯片引线框架3抬离底层，所述金属散热盘6还延伸进入驱动芯片引线框架3下方的底层区域。在本实施例中，在底层上设有搭线基岛5，用于连接驱动芯片31和功率芯片30的金属引线以所述搭线基岛5为中继桥接点实现驱动芯片31和功率芯片30的连接。
为使本发明的目的、技术方案和优点更加清晰，以下结合附图及一优选实例对本发明的实施方案作进一步详细描述。
图1为本发明实例中一种功率模块的方形扁平无引脚封装结构实例的无引线三维视图；图2为本发明实例中一种功率模块的方形扁平无引脚封装结构实例的俯视示意图；图3是沿A-a截面的一种功率模块的方形扁平无引脚封装结构实例的剖面图；图4为沿B-b截面的一种功率模块的方形扁平无引脚封装结构实例的剖面图；图5为沿着C-c截面的一种功率模块的方形扁平无引脚封装结构实例的剖面图；图6为在D-d截面一种功率模块的方形扁平无引脚封装结构实例的剖面图；图7和图8分别为在环境温度为20℃且相同功率附加的情况下，改进结构功率模块和原结构模块的散热分析图。
如图1～图6所示，一种功率模块的方形扁平无引脚封装结构，具体包括：裸露的大面积金属散热盘6，分布于封装模块底部；四周设计有用来替代引脚作用的金属电极触点20；功率芯片引线框架2；驱动芯片引线框架3和对其起抬高作用的金属支柱4；实现驱动芯片31与驱动芯片引线框架3之间以及功率芯片30与功率芯片引线框架2之间互连的导电焊料7和银浆8；作为引线桥接的搭线基岛5；实现电性连接的多根金属导线，铜引线101和金引线102；封装空间填充材料为绝缘树脂1。
如图3～图6所示，金属散热盘6位于功率芯片引线框架2下方，二者通过胶带9互相连接，面积尺寸小于功率芯片引线框架2尺寸；功率芯片30配置于功率芯片引线框架2上方，通过导电焊料7和银浆8相连，其中导电焊料7覆盖在功率芯片30底部，银浆8直接电镀于功率芯片引线框架2上方；导电焊料7和银浆8直接粘连。
如图1～图5所示，驱动芯片引线框架3通过其四角下方四金属支柱4抬高，二者之间通过胶带9互相连接；驱动芯片31通过导电焊料7和银浆8粘连于驱动芯片引线框架3上方，其中导电焊料7覆盖于驱动芯片底部，银浆8电镀于驱动芯片引线框架3上方，导电焊料7和银浆8直接粘连。
如图1～图5所示，部分功率芯片引线框架2以及所对应的金属散热盘6伸入至驱动芯片引线框架3下方。
如图1～图5所示，设计有搭线基岛5，搭线基岛5顶部同样电镀一层银浆8。金引线102通过键合工艺连接于驱动芯片31和搭线基岛5、功率芯片30、金属电极触点20、功率芯片引线框架2之间；铜引线101通过键合工艺连接在功率芯片30和搭线基岛5、金属电极触点20、功率芯片引线框架2之间。
如图7～图8所示，分别是改进结构和原结构在相同环境下，功率芯片赋值相同功率情况下的散热分析。如图7所示，改进结构中最高温度为123.2℃，最低为53.348℃，如图8所示，原结构中最高温度为131.8℃，最低为43.796℃；显然图7所示改进结构模块区域之间温度差小于图8所示原模块，说明改进结构使得封装功率模块整体温度分布趋向均匀化，避免了局部温度过高。在图7和图8所示模块的高温区域，图7所示改进结构模块的温度小于图8所示功率模块的温度，因此图7所示改进结构模块散热效率也优于图8所示功率模块。
本发明的应用实例并不局限于图示包含一颗驱动芯片、六颗功率芯片的功率模块的封装结构，它同样适用于多颗驱动芯片、多颗功率芯片的模块封装。
以上所述的具体实施方式，对本发明的目的、技术方案和有益效果进行了进一步的详细说明，所应理解的是，以上所述仅为本发明的具体实施方式而已，并不限定本发明的保护范围。任何熟悉本领域的技术人员，在不脱离本发明技术方案范围情况下，都可利用上述揭示的方法和技术内容对本发明技术方案做出许多可能的变动和修饰，或修改为等同变化的等效实施例。因此，凡在本发明的精神和原则之内，所做的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。

Claims (2)

1.一种方形扁平无引脚封装结构的功率模块，包括：绝缘树脂(1)、驱动芯片(31)、功率芯片(30)和金属电极触点(20)，驱动芯片(31)、功率芯片(30)和金属电极触点(20)按照既定设计电路并通过金属引线电连接，在绝缘树脂(1)的底层设有用于功率芯片散热的金属散热盘(6)，在绝缘树脂(1)的中间部分设有驱动芯片引线框架(3)，在金属散热盘(6)上设有功率芯片引线框架(2)，所述功率芯片(30)设在功率芯片引线框架(2)上且功率芯片(30)的漏极与金属散热盘(6)电连接，在所述驱动芯片引线框架(3)上设有驱动芯片(31)，其特征在于，所述用于功率芯片散热的金属散热盘(6)在底层的驱动芯片引线框架(3)及金属电极触点(20)占据的以外区域延伸以布满底层的驱动芯片引线框架(3)及金属电极触点(20)占据的以外区域，在驱动芯片引线框架(3)的下方设有金属支柱(4)，所述金属支柱(4)立于底层并将驱动芯片引线框架(3)抬离底层，所述金属散热盘(6)还延伸进入驱动芯片引线框架(3)下方的底层区域。
2.根据权利要求1所述的方形扁平无引脚封装结构的功率模块，其特征在于，在底层上设有搭线基岛(5)，用于连接驱动芯片(31)和功率芯片(30)的金属引线以所述搭线基岛(5)为中继桥接点实现驱动芯片(31)和功率芯片(30)的连接。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1458691A (zh) * 2002-04-26 2003-11-26 半导体元件工业有限责任公司 形成多引线框半导体器件的结构和方法
CN101887886A (zh) * 2009-04-06 2010-11-17 成都芯源系统有限公司 一种多芯片封装及制造方法
CN102820276A (zh) * 2011-06-10 2012-12-12 南茂科技股份有限公司 四方扁平无接脚封装及其制造方法
CN103972113A (zh) * 2014-05-22 2014-08-06 南通富士通微电子股份有限公司 封装方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19645636C1 (de) * 1996-11-06 1998-03-12 Telefunken Microelectron Leistungsmodul zur Ansteuerung von Elektromotoren
US6819095B1 (en) * 1999-09-16 2004-11-16 International Rectifier Corporation Power semiconductor device assembly with integrated current sensing and control
JP3676719B2 (ja) * 2001-10-09 2005-07-27 株式会社日立製作所 水冷インバータ
US8587101B2 (en) * 2010-12-13 2013-11-19 International Rectifier Corporation Multi-chip module (MCM) power quad flat no-lead (PQFN) semiconductor package utilizing a leadframe for electrical interconnections
US9524928B2 (en) * 2010-12-13 2016-12-20 Infineon Technologies Americas Corp. Power quad flat no-lead (PQFN) package having control and driver circuits
US9659845B2 (en) * 2010-12-13 2017-05-23 Infineon Technologies Americas Corp. Power quad flat no-lead (PQFN) package in a single shunt inverter circuit
US8664754B2 (en) * 2011-01-03 2014-03-04 International Rectifier Corporation High power semiconductor package with multiple conductive clips
JP6337394B2 (ja) * 2013-07-05 2018-06-06 パナソニックＩｐマネジメント株式会社 半導体装置
CN105118818B (zh) * 2015-07-20 2018-08-21 东南大学 一种方形扁平无引脚封装结构的功率模块

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1458691A (zh) * 2002-04-26 2003-11-26 半导体元件工业有限责任公司 形成多引线框半导体器件的结构和方法
CN101887886A (zh) * 2009-04-06 2010-11-17 成都芯源系统有限公司 一种多芯片封装及制造方法
CN102820276A (zh) * 2011-06-10 2012-12-12 南茂科技股份有限公司 四方扁平无接脚封装及其制造方法
CN103972113A (zh) * 2014-05-22 2014-08-06 南通富士通微电子股份有限公司 封装方法

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