CN104717444B - Automatic switching method of more video formats to VESA agreement 1920X1440 resolution ratio 75Hz frame-rate videos - Google Patents
Automatic switching method of more video formats to VESA agreement 1920X1440 resolution ratio 75Hz frame-rate videos Download PDFInfo
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Abstract
Automatic switching method the present invention relates to from more video formats to VESA agreement 1920X1440 resolution ratio 75Hz frame-rate videos, comprises the following steps：1】Create automated conversion system；2】The vision signal of input is respectively fed in protocol detection module；3】High level enable signal CEn drives the valid pixel of agreement N collecting units collection incoming video signal corresponding with agreement N detection units；4】Control signal amounts of the high level enable signal CEn as multidiameter option switch controller；5】Scaling processing module is scaled 1920X1440 resolution sizes, while is written into output memory cell；6】Send control module and realize conversion of the input video to VESA agreement 1920X1440 resolution ratio 75Hz frame-rate videos.The present invention solves the integrated sex chromosome mosaicism that the video of any protocol type is changed to pal mode, and the video of any protocol type and resolution ratio can be automatically converted to the video for meeting VESA agreements by the present invention, and video format conversion is time-consuming small.
Description
Technical field
The invention belongs to Video processing, graph image field, and in particular to a kind of more video formats are to VESA agreements
The automatic switching method of 1920X1440 resolution ratio 75Hz frame-rate videos.
Background technology
VESA (Video Electronics Standards Association) monitor sequential standard is a kind of numeral
Change video interface agreement, the ability of its powerful support 1920X1440 resolution ratio 75Hz frame per second image transmission, make its often conduct
The general output interface of optoelectronic integration system HD video.But for existing vision sensor, its video exported association
View and resolution ratio are different, therefore sometimes generally require the video of the various agreements of vision sensor output entering row format conversion
And it is scaled 1920X1440 resolution ratio；Although there are various video formats to meeting various points of VESA agreements at present
The chip of resolution Video Quality Metric, but this kind of chip often only supports the encoding and decoding to a kind of or a kind of input video.
With electronic technology, the development of large scale integrated circuit, realized using field programmable gate array (FPGA)
Complicated control and processing function has very big advantage in integration, stability and reliability etc., and research is based on
Automatic conversion controlling party of the FPGA various video form to the 1920X1440 resolution ratio 75Hz frame-rate videos for meeting VESA agreements
Method has broad application prospects.
The content of the invention
The present invention is to solve the video of any protocol type to the 1920X1440 resolution ratio 75Hz for meeting VESA agreements
The integrated sex chromosome mosaicism of frame-rate video conversion, it is proposed that a kind of more video formats regard to VESA agreement 1920X1440 resolution ratio 75Hz
The automatic switching method of frequency.
The technical solution of the present invention：
For more video formats to the automatic switching method of VESA agreement 1920X1440 resolution ratio 75Hz frame-rate videos, its is special
Part is, comprises the following steps：
1】Create automated conversion system：
Including protocol detection module：Height is produced for carrying out agreement matching to incoming video signal, and according to matching result
Level enable signal CEn or low level enable signal, including the detection unit of agreement 1, the detection unit ... of agreement 2 and agreement N
Detection unit；
Video acquisition module：The valid pixel of incoming video signal to matching by protocol detection module is adopted
Collection, including the collecting unit of agreement 1, the collecting unit ... of agreement 2 and agreement N collecting units；The collecting unit of various agreements with
Detection unit is corresponded, and the high level enable signal CEn is inputted to corresponding agreement N collecting units and multidiameter option switch
Controller；
Multidiameter option switch controller：For under high level enable signal CEn control, the video that agreement matches to be adopted
The effective pixel data that collection module collects buffers into collection memory cell；
Gather memory cell：For caching the effective pixel data of incoming video signal；
Scale processing module：Effective pixel data is read from collection memory cell for real time sequence and uses bilinearity
Interpolation algorithm scales it the resolution sizes for 1920*1440, while sends it to output memory cell；
Export memory cell：For storing the effective pixel data after scaling processing module processing；
And send control module：For according to VESA agreement 1920X1440 resolution ratio 75Hz frame-rate video sequential standards
The control pixel stream in video blanking area is produced, and the pixel data after scaling is sequentially read from output memory cell, is filled into
The effective pixel region of video data stream, so as to realize that input video turns to VESA agreement 1920X1440 resolution ratio 75Hz videos
Change；
2】The vision signal of input is respectively fed into protocol detection module be detected in each protocol detection unit,
If the vision signal of input matches with the agreement of agreement N detection units, agreement N detection units produce the enabled of high level
Signal CEn, while remaining protocol detection unit produces low level enable signal；
3】High level enable signal CEn drives agreement N collecting units collection input video corresponding with agreement N detection units
The valid pixel of signal；Simultaneously low level enable signal make with its corresponding to agreement collecting unit be in reset state；
4】Control signal amounts of the high level enable signal CE as multidiameter option switch controller so that only agreement matching
The valid pixel of vision signal of agreement N collecting units collection to pass through multidiameter option switch controller cache single to storage is gathered
Member；
5】Scale processing module and read the effective pixel data of whole frame from collection memory cell order, and use bilinearity
Interpolation algorithm scales it the resolution sizes for 1920*1440, while is written into output memory cell；
6】Send control module and produce video according to VESA agreement 1920X1440 resolution ratio 75Hz frame-rate video sequential standard
The control pixel stream of blanking zone, and the pixel data after scaling is sequentially read from output memory cell, it is filled into video data
The effective pixel region of stream, so as to realize conversion of the input video to VESA agreement 1920X1440 resolution ratio 75Hz videos.
Each protocol detection unit in protocol detection module works in the way of parallel pipelining process.
Above-mentioned collection memory cell includes buffering area A and buffering area B, specific storing step are：
During current video frame data Cun Chudao buffering area A, the previous frame video data that storage is read from buffering area B is sent
Give scaling processing module；
When the storage of next frame video data is to buffering B, the data that current video frame is read from buffering area A are sent to scaling
Processing module.
Above-mentioned protocol detection module is analyzed and calculates the following protocol status parameter of input video stream in real time：Adjacent field synchronization
The line synchronising signal Hsync pulse numbers included between signal Vsync pulses；Field sync signal Vsync pulse width ranges
The line synchronising signal Hsync pulse numbers inside included；The pixel clock CLK included between adjacent line synchronising signal Hsync pulses
Number of cycles；The pixel clock clk cycle number included in line synchronising signal Hsync pulse width ranges；In valid pixel row
The pixel clock clk cycle number included in data valid signal De pulse widths；From field sync signal Vsync impulse hits
To the line synchronising signal Hsync pulse numbers included between first valid pixel row；From the synchronous letter of row in valid pixel row
Feel the pulse to rush Hsync saltus steps and play the pixel clock clk cycle that is included between data valid signal De and count.
The VESA protocol videos detection unit of above-mentioned protocol detection module including various resolution ratio, various resolution ratio
RawRGB format videos detection unit, meet the video detecting unit of SMPTE274 agreements, meet ITU601, ITU656 and
The video detecting unit of ITU709 agreements；The VESA protocol videos collection that the video acquisition module includes various resolution ratio is single
The RawRGB format videos collecting unit of first, various resolution ratio, meet the video acquisition unit of SMPTE274 agreements, meet
The video acquisition unit of ITU601, ITU656 and ITU709 agreement；And detectable protocol type can be according to concrete application need
Ask autonomous customization and cut.
Above-mentioned steps 2】Concretely comprise the following steps：
2.1】Real-time synchronization calculates each state parameter of incoming video signal；
2.2】The each state parameter calculated is contrasted with the state parameter of each agreement of corresponding protocol detection module：
If state parameter is consistent, inputting video data belongs to this kind of agreement；Otherwise, then it is not belonging to this kind of agreement.
The beneficial effects of the invention are as follows：
The video of any protocol type and resolution ratio can be automatically converted to and meet VESA agreement 1920X1440 resolution ratio
75Hz frame-rate videos, and video format conversion is time-consuming small；Can dynamic detection video protocols change, when input source video protocols send out
After changing, the detection to its protocol type can be completed in the time interval that a two field picture inputs；Detectable protocol type
Can be according to independently customization and the cutting of concrete application demand.
Brief description of the drawings
Fig. 1 is that more video formats are former to the automatic switching method of VESA agreement 1920X1440 resolution ratio 75Hz frame-rate videos
Reason figure.
Embodiment
The present invention using FPGA realize more video formats to VESA agreement 1920X1440 resolution ratio 75Hz frame-rate videos from
Dynamic conversion method, by establishing many general video protocol data storehouse, is analyzed the data flow of incoming video signal, and each
The conventional affiliated protocol type of video protocol data stream multilevel iudge of kind, while detection image resolution ratio and frame per second；Designed image frame
Double buffering A and B, the valid pixel of video stream data frame is stored in buffering area A by the way of ping-pong operation, while according to figure
The resolution ratio of picture is scaled 1920*1440 resolution to the complete data frame cached in buffering area B using bilinear interpolation algorithm
Rate size is simultaneously stored in output memory cell；Produced according to VESA agreement 1920X1440 resolution ratio 75Hz frame-rate video sequential standard
The control pixel stream in video blanking area, and the pixel data after scaling is sequentially read from output memory cell, it is filled into video
The effective pixel region of data flow, so as to realize conversion of the input video to VESA agreement 1920X1440 resolution ratio 75Hz videos；
Realize that details is specific as follows：
1】Design is for various conventional video protocols (including the VESA agreements of various resolution ratio, various resolution ratio
RawRGB forms, ITU601, ITU656, ITU709 and SMPTE274 agreement) detection module, detection module pass through analyze one
The time interval of full frame images expert's field sync signal and the changing rule of blanking zone video data, whether judge input video
Belong to this kind of agreement；
Detection module sets the state parameter of following video protocols, is respectively：Adjacent field sync signal (Vsync) pulse it
Between line synchronising signal (Hsync) pulse number for being included, the Hsync pulse numbers included in Vsync pulse width ranges, phase
Pixel clock (CLK) cycle count included between adjacent Hsync pulses, the clk cycle meter included in Hsync pulse width ranges
Count, the clk cycle pulse number included in valid pixel row in data valid signal (De) pulse width, from Vsync signal arteries and veins
Rush saltus step and play the Hsync pulse numbers included between first valid pixel row (field blanking area), in valid pixel row from
Hsync signal pulse saltus steps play De signals it is effective between (horizontal blanking area) clk cycle for being included count；
2】The data of input video and control signal wire (CLK, Hsync, Vsync and De) are respectively fed to each video protocols
Detection module, detection module analyze the data flow of input picture frame, detect and calculate above-mentioned state parameter, if the parameter detected
It is consistent with the state parameter of agreement to be detected, then it is assumed that input video belongs to this kind of agreement, otherwise, is then not belonging to this kind of agreement；
If certain agreement matches input video, the detection module of this kind of agreement produces the enable signal CEn of high level, drives it corresponding
Acquisition module；Other protocol detection modules output simultaneously is low level signal, and makes video acquisition corresponding at its rear end
Module is in reset state.
3】A multidiameter option switch controller is designed, using the CEn of each video protocols detection module output as control signal
Amount, the video data stream of each video protocols acquisition module collection is input, and gating CEn is collection video data corresponding to high level
Stream carries out follow-up caching and scaling processing operation；
4】Double buffering A and B are designed, the valid pixel of the adjacent two field pictures continuously to arrive is cached, to buffering area A and B
Ping-pong operation is carried out, when current frame image is filled into buffering area A, bilinear interpolation is used to the previous frame image cached in B
Algorithm is scaled 1920*1440 and differentiates size, and is filled into transmission output memory cell；, will be next in subsequent time period
Two field picture buffers into buffering area B and bilinear interpolation processing is carried out to the picture frame in buffering area A and is stored in transmission output storage
Unit；
5】The control in video blanking area is produced according to VESA agreement 1920X1440 resolution ratio 75Hz frame-rate video sequential standard
Pixel stream, and the pixel data after scaling is sequentially read from output memory cell, it is filled into the valid pixel of video data stream
Area, so as to realize conversion of the input video to VESA agreement 1920X1440 resolution ratio 75Hz videos.
The automatic conversion control method of the present invention successful implementation in certain type test module, can dynamically be examined in real time
The vision signal of the agreements such as RawRGB, BT.656, BT.709, SMPTE273 and SMPTE274 is surveyed, is automatically performed at video scaling
Manage and be uniformly converted to the 1920X1440 resolution ratio 75Hz videos for meeting VESA agreements, the processing speed of Video Quality Metric is fast, output
It is steady and audible.
Claims (6)
- To the automatic switching method of VESA agreement 1920X1440 resolution ratio 75Hz frame-rate videos, 1. its feature exists video format more than In comprising the following steps：1】Create automated conversion system：Including protocol detection module：High level is produced for carrying out agreement matching to incoming video signal, and according to matching result Enable signal CEn or low level enable signal, including the detection unit of agreement 1, the detection unit ... of agreement 2 and agreement N detections Unit；Video acquisition module：The valid pixel of incoming video signal to matching by protocol detection module is acquired, and is wrapped Include the collecting unit of agreement 1, the collecting unit ... of agreement 2 and agreement N collecting units；The collecting unit of various agreements is single with detection Member is corresponded, and the high level enable signal CEn is inputted to corresponding agreement N collecting units and multidiameter option switch control Device；Multidiameter option switch controller：For the video acquisition mould that under high level enable signal CEn control, agreement is matched The effective pixel data that block collects buffers into collection memory cell；Gather memory cell：For caching the effective pixel data of incoming video signal；Scale processing module：Effective pixel data is read from collection memory cell for real time sequence and uses bilinear interpolation Algorithm scales it the resolution sizes for 1920*1440, while sends it to output memory cell；Export memory cell：For storing the effective pixel data after scaling processing module processing；And send control module：For being produced according to VESA agreement 1920X1440 resolution ratio 75Hz frame-rate video sequential standard The control pixel stream in video blanking area, and the pixel data after scaling is sequentially read from output memory cell, it is filled into video The effective pixel region of data flow, so as to realize conversion of the input video to VESA agreement 1920X1440 resolution ratio 75Hz videos；2】The vision signal of input is respectively fed into protocol detection module be detected in each protocol detection unit, if defeated The vision signal entered matches with the agreement of agreement N detection units, then agreement N detection units produce the enable signal of high level CEn, while remaining protocol detection unit produces low level enable signal；3】High level enable signal CEn drives agreement N collecting units collection incoming video signal corresponding with agreement N detection units Valid pixel；Simultaneously low level enable signal make with its corresponding to agreement collecting unit be in reset state；4】Control signal amounts of the high level enable signal CEn as multidiameter option switch controller so that only agreement matches The valid pixel of the vision signal of agreement N collecting units collection is single to storage is gathered by multidiameter option switch controller cache Member；5】Scale processing module and read the effective pixel data of whole frame from collection memory cell order, and use bilinear interpolation Algorithm scales it the resolution sizes for 1920*1440, while is written into output memory cell；6】Send control module and produce video blanking according to VESA agreement 1920X1440 resolution ratio 75Hz frame-rate video sequential standard The control pixel stream in area, and the pixel data after scaling is sequentially read from output memory cell, it is filled into video data stream Effective pixel region, so as to realize conversion of the input video to VESA agreement 1920X1440 resolution ratio 75Hz videos.
- 2. more video formats according to claim 1 to VESA agreement 1920X1440 resolution ratio 75Hz frame-rate videos from Dynamic conversion method, it is characterised in that each protocol detection unit in protocol detection module works in the way of parallel pipelining process.
- 3. more video formats according to claim 1 or 2 are to VESA agreement 1920X1440 resolution ratio 75Hz frame-rate videos Automatic switching method, it is characterised in that the collection memory cell includes buffering area A and buffering area B, specific storing step are：During current video frame data Cun Chudao buffering area A, the previous frame video data that storage is read from buffering area B is sent to contracting Put processing module；When the storage of next frame video data is to buffering B, the data that current video frame is read from buffering area A are sent to scaling processing Module.
- 4. more video formats according to claim 3 to VESA agreement 1920X1440 resolution ratio 75Hz frame-rate videos from Dynamic conversion method, it is characterised in thatThe protocol detection module is analyzed and calculates the following protocol status parameter of input video stream in real time：Adjacent field sync signal The line synchronising signal Hsync pulse numbers included between Vsync pulses；Wrapped in field sync signal Vsync pulse width ranges The line synchronising signal Hsync pulse numbers contained；The pixel clock clk cycle included between adjacent line synchronising signal Hsync pulses Number；The pixel clock clk cycle number included in line synchronising signal Hsync pulse width ranges；Data in valid pixel row The pixel clock clk cycle number included in useful signal De pulse widths；Is played from field sync signal Vsync impulse hits The line synchronising signal Hsync pulse numbers included between one valid pixel row；From line synchronising signal arteries and veins in valid pixel row Rush Hsync saltus steps and play the pixel clock clk cycle counting included between data valid signal De.
- 5. more video formats according to claim 4 to VESA agreement 1920X1440 resolution ratio 75Hz frame-rate videos from Dynamic conversion method, it is characterised in that：The protocol detection module includes the VESA protocol videos detection unit of various resolution ratio, the RawRGB lattice of various resolution ratio Formula video detecting unit, the video detecting unit for meeting SMPTE274 agreements, meet ITU601, ITU656 and ITU709 agreement Video detecting unit；The video acquisition module includes the VESA protocol videos collecting unit of various resolution ratio, various resolution ratio RawRGB format videos collecting unit, meet the video acquisition unit of SMPTE274 agreements, meet ITU601, ITU656 and The video acquisition unit of ITU709 agreements；And detectable protocol type independently can customize and cut out according to concrete application demand Cut.
- 6. more video formats according to claim 5 to VESA agreement 1920X1440 resolution ratio 75Hz frame-rate videos from Dynamic conversion method, it is characterised in thatThe step 2】Concretely comprise the following steps：2.1】Real-time synchronization calculates each state parameter of incoming video signal；2.2】The each state parameter calculated is contrasted with the state parameter of each agreement of corresponding protocol detection module：If State parameter is consistent, then inputting video data belongs to this kind of agreement；Otherwise, then it is not belonging to this kind of agreement.
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| CN105430297B (en) * | 2015-12-11 | 2018-03-30 | 中国航空工业集团公司西安航空计算技术研究所 | The automatic control system that more video formats are changed to IIDC protocol videos form |
| CN108234917A (en) * | 2016-12-14 | 2018-06-29 | 中国航空工业集团公司西安航空计算技术研究所 | A kind of CCD camera multiresolution RawRGB format videos are to the conversion method of VESA protocol videos |
| CN108184090B (en) * | 2017-12-07 | 2020-09-22 | 中国航空工业集团公司西安航空计算技术研究所 | Automatic conversion method for multi-resolution VESA video of CMOS camera to BT1120 protocol video |
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| CN109743520A (en) * | 2019-01-14 | 2019-05-10 | 苏州长风航空电子有限公司 | A kind of multipath resolution dynamic self-adapting Airborne Video Recording System |
| CN111131740B (en) * | 2019-12-03 | 2021-03-05 | 中国航空工业集团公司洛阳电光设备研究所 | VESA time sequence real-time conversion method for realizing arbitrary scaling |
| CN111601104B (en) * | 2020-05-28 | 2021-07-06 | 湖南安元信息科技有限公司 | Resolution-adaptive ARINC818 bus simulation test equipment and resolution-adaptive method |
| CN113450245B (en) * | 2021-05-11 | 2024-02-06 | 中天恒星(上海)科技有限公司 | Image processing method, device, chip and equipment |
| CN114125182A (en) * | 2021-11-25 | 2022-03-01 | 中航华东光电有限公司 | A method for realizing 4K high-definition display based on FPGA |
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