CN104253088B - Prevent the film forming process of aluminium glut - Google Patents
Prevent the film forming process of aluminium glut Download PDFInfo
- Publication number
- CN104253088B CN104253088B CN201410165264.2A CN201410165264A CN104253088B CN 104253088 B CN104253088 B CN 104253088B CN 201410165264 A CN201410165264 A CN 201410165264A CN 104253088 B CN104253088 B CN 104253088B
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- silicon
- aluminium
- film
- aluminium copper
- etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/7685—Barrier, adhesion or liner layers the layer covering a conductive structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
- H01L2221/1068—Formation and after-treatment of conductors
- H01L2221/1073—Barrier, adhesion or liner layers
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The invention discloses a kind of film forming process for preventing aluminium glut, comprising steps of (1) on silicon wafer, carries out silicon contact through hole etching;(2) in silicon chip surface, the side wall of silicon contact through hole and bottom, the first aluminium copper silicon film is formed, and silicon wafer is cooled to room temperature;(3) the first aluminium copper silicon film is performed etching;(4) in the first aluminium copper silicon film surface, the second aluminium copper silicon film is formed;(5) etching of metallic aluminium copper silicon.Film forming process of the invention effectively reduces silicon contact bottom diffusion before film forming, prevents from forming Al glut, to prevent component failure.
Description
Technical field
The present invention relates to the film build methods in a kind of semiconductor field, more particularly to a kind of film forming work for preventing aluminium glut
Process.
Background technique
As semiconductor devices develops to deep sub-micron dimensions, the concentration and complexity of device are all continuously increased,
Requirement to manufacturing process simultaneously is also increasingly harsher.Through-hole is as between more metal layers interconnection and device and external circuitry
The channel of connection plays very important effect in device composition.
Especially during sial contact process, solubility of the silicon in aluminium is bigger than solubility of the aluminium in silicon, from
And silicon is caused to dissolve in aluminium, to form aluminium glut (Al-Spike) (as shown in Figs. 1-2).General technique is added in Al
The silicon for entering 1% (Wt%) can largely solve aluminium glut phenomenon.
Wherein, Al/Si principle of dissolving each other is as follows:
1) Al/ silicon dissolves each other: solubility of the Al in silicon is very low;
Solubility of the silicon in Al is relatively high;
2) Al and SiO2Reaction: 3SiO2+4Al→3Si+2Al2O3
But be added 1% silicon can not be fully solved all aluminium spine phenomenons, in certain techniques, due to Al with
SiO2Reaction leads to Al and SiO there are the generation of Si crystal grain2Contact surface there is a large amount of Si to be dissolved in Al, when temperature is higher
Al is formed to be easy to wear out SiO2The phenomenon as described in Fig. 1-B is caused with the interface of Si substrate, it is bad so as to cause device.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of film forming process for preventing aluminium glut.Method of the invention
It can solve aluminium glut phenomenon caused by existing aluminium silicon contacts, prevent component failure.
In order to solve the above technical problems, the film forming process for preventing aluminium glut of the invention, comprising steps of
(1) on silicon wafer, silicon contact through hole etching is carried out;
(2) in silicon chip surface, the side wall of silicon contact through hole and bottom, formed the first aluminium copper silicon film (i.e. aluminium copper silicon it is pre- at
Film), and silicon wafer is cooled to room temperature;
(3) the first aluminium copper silicon film is performed etching, to remove surface film oxide;
(4) in the first aluminium copper silicon film surface, the second aluminium copper silicon film is formed;
(5) etching of metallic aluminium copper silicon.
In the step (1), the base material of silicon contact through hole includes: semiconductor silicon.
In the step (2), the method for forming the first aluminium copper silicon film includes: the method for physical sputtering film forming, wherein sputtering
Temperature is 10~500 DEG C, and sputtering pressure is 1~10torr;First aluminium copper silicon film with a thickness of 10~2000。
In the step (3), the method for etching includes: physical vapor plasma etching method, wherein etching temperature 10
~500 DEG C, etching pressure is 1~10torr, and etch thicknesses are formed by the thickness of surface alumina oxide according to the first aluminium copper silicon film
Depending on, generally 10~500。
In the step (4), the method for forming the second aluminium copper silicon film includes: the method for physical sputtering film forming, wherein sputtering
Temperature is 10~500 DEG C, and pressure is 1~10torr;Second aluminium copper silicon film with a thickness of 10~20000。
After the present invention is by one layer of membranae praeformativa thin of metallic aluminium copper silicon film, since film formation time is short, aluminium film and SiO2Reaction
Amount it is few, though the silicon for having part to generate at high temperature is dissolved by aluminium, solubility of the silicon in aluminium is very small, when cooling
Saturation, and have part Si precipitation, to prevent the aluminium copper silicon of membranae praeformativa from continuing to dissolve each other with Si;It, will again before aluminium copper silicon film forming
The membranae praeformativa of oxidation etches away a part, effectively prevents the presence of oxidation film and affects the electric conductivity of aluminium film;Again at
Although film has a presence of high temperature, but corresponding film formation time is reduced, and the presence of bottom membranae praeformativa enveloped it is subsequent
Hot aluminium, have in the aluminium film of membranae praeformativa in addition be precipitated Si presence, also effectively prevent high temperature under dissolution of the hot aluminium to Si.
Therefore, film forming process of the invention effectively reduces silicon contact bottom diffusion before film forming, prevents from forming Al
Glut, to prevent component failure.
Detailed description of the invention
Present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments:
Fig. 1-A, 1-B are SEM (scanning electron microscope) figures of Al-Spike phenomenon (AlSiCu horizontal proliferation);
Fig. 2 is common Al-Spike longitudinal diffusion simulation drawing;
Fig. 3 is process flow chart of the invention;
Fig. 4 is etched out the schematic diagram after through-hole;
Fig. 5 is the schematic diagram to be formed after the first aluminium copper silicon film;
Fig. 6 is the schematic diagram performed etching to the first aluminium copper silicon film;
Fig. 7 is the schematic diagram to form the second aluminium copper silicon film.
The reference numerals are as follows in figure:
1 is silicon substrate, and 2 be oxide layer, and 3 be silicon contact through hole, and 4 be the first aluminium copper silicon film, and 5 be the second aluminium copper silicon film.
Specific embodiment
The film forming process for preventing aluminium glut of the invention, can be used for the production of aluminium silicon contact process.The stream of this method
Journey is as shown in figure 3, its step includes:
(1) according to common process, in silicon wafer (such as oxide layer 2 of substrate silicon 1), the etching of silicon contact through hole 3 is carried out (as schemed
Shown in 4);
Wherein, the base material of silicon contact through hole 3 is semiconductor silicon (silicon substrate 1).
(2) in silicon chip surface, the side wall of silicon contact through hole 3 and bottom, the method (sputter temperature to be formed a film by physical sputtering
It is 10~500 DEG C, sputtering pressure is 1~10torr), the first aluminium copper silicon film 4 (i.e. the membranae praeformativa of aluminium copper silicon) is formed, and forming a film
After, silicon wafer is cooled to room temperature (as shown in Figure 5);
Wherein, the thickness of the first aluminium copper silicon film 4 can be 10~2000;
(3) plasma etch processes are carried out to the first aluminium copper silicon film 4, such as (is carved using physical vapor plasma etching method
Losing temperature is 10~500 DEG C, and etching pressure is 1~10torr) the first aluminium copper silicon film 4 is performed etching, to remove surface oxidation
Film (as shown in Figure 6);
Wherein, depending on etch thicknesses are formed by the thickness of surface alumina oxide according to the first aluminium copper silicon film 4, generally 10~
500。
(4) on 4 surface of the first aluminium copper silicon film, by physical sputtering form a film method (sputter temperature be 10~500 DEG C,
Pressure is 1~10torr), form the second aluminium copper silicon film 5 (as shown in Figure 7);
Wherein, the thickness of the second aluminium copper silicon film 5 can be 10~20000。
(5) according to common process, the etching of metallic aluminium copper silicon is carried out.
It operates according to the method described above, the present invention can effectively reduce silicon contact bottom diffusion before film forming, prevent from forming Al
Glut.
Claims (5)
1. a kind of film forming process for preventing aluminium glut, which is characterized in that comprising steps of
(1) on silicon wafer, silicon contact through hole etching is carried out;
(2) in silicon chip surface, the side wall of silicon contact through hole and bottom, the first aluminium copper silicon film is formed, and silicon wafer is cooled to room temperature;
Film formation time is short, and the amount that aluminium film is reacted with SiO2 is few, though the silicon for having part to generate at high temperature is dissolved by aluminium, silicon is in aluminium
Solubility it is very small, when cooling, has been saturated, and has part Si precipitation, thus prevent the aluminium copper silicon of membranae praeformativa continue with
Si dissolves each other;
(3) the first aluminium copper silicon film is performed etching, the thickness of etching is formed by surface alumina oxide according to the first aluminium copper silicon film
Depending on thickness, it is 10~500, removes surface alumina oxide;
(4) in the first aluminium copper silicon film surface, the second aluminium copper silicon film is formed;When aluminium copper silicon forms a film again, film formation time is reduced, and
And the presence of bottom membranae praeformativa has enveloped subsequent hot aluminium, has the presence that Si is precipitated in the aluminium film of membranae praeformativa in addition, also has
Dissolution of the hot aluminium to Si under the prevention high temperature of effect;
(5) etching of metallic aluminium copper silicon.
2. the method as described in claim 1, it is characterised in that: in the step (1), the base material packet of silicon contact through hole
It includes: semiconductor silicon.
3. the method as described in claim 1, it is characterised in that: in the step (2), form the method packet of the first aluminium copper silicon film
It includes: the method for physical sputtering film forming, wherein sputter temperature is 10~500 DEG C, and sputtering pressure is 1~10torr;
First aluminium copper silicon film with a thickness of 10~2000.
4. the method as described in claim 1, it is characterised in that: in the step (3), the method for etching includes: physical vapor
Plasma etching method, wherein etching temperature is 10~500 DEG C, and etching pressure is 1~10torr.
5. the method as described in claim 1, it is characterised in that: in the step (4), form the method packet of the second aluminium copper silicon film
It includes: the method for physical sputtering film forming, wherein sputter temperature is 10~500 DEG C, and pressure is 1~10torr;
Second aluminium copper silicon film with a thickness of 10~20000.
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CN201410165264.2A CN104253088B (en) | 2014-04-23 | 2014-04-23 | Prevent the film forming process of aluminium glut |
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CN201410165264.2A CN104253088B (en) | 2014-04-23 | 2014-04-23 | Prevent the film forming process of aluminium glut |
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CN104253088B true CN104253088B (en) | 2019-06-11 |
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1068444A (en) * | 1991-07-08 | 1993-01-27 | 三星电子株式会社 | Semiconductor device and manufacture method thereof |
CN1885507A (en) * | 2005-06-20 | 2006-12-27 | 富士电机电子设备技术株式会社 | Method of producing a semiconductor device |
CN101740366A (en) * | 2008-11-19 | 2010-06-16 | 无锡华润矽科微电子有限公司 | Method for eliminating aluminum tip cut of bipolar NPN transistor |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
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DE102004003538B3 (en) * | 2004-01-23 | 2005-09-08 | Infineon Technologies Ag | Integrated semiconductor circuit with logic and power metallization without intermetallic dielectric and method for its production |
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2014
- 2014-04-23 CN CN201410165264.2A patent/CN104253088B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1068444A (en) * | 1991-07-08 | 1993-01-27 | 三星电子株式会社 | Semiconductor device and manufacture method thereof |
CN1885507A (en) * | 2005-06-20 | 2006-12-27 | 富士电机电子设备技术株式会社 | Method of producing a semiconductor device |
CN101740366A (en) * | 2008-11-19 | 2010-06-16 | 无锡华润矽科微电子有限公司 | Method for eliminating aluminum tip cut of bipolar NPN transistor |
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