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Yu et al., 2018 - Google Patents

End-to-end industrial study of retiming

Yu et al., 2018

View PDF
Document ID
15933463093838308997
Author
Yu C
Huang C
Nam G
Choudhury M
Kravets V
Sullivan A
Ciesielski M
De Micheli G
Publication year
Publication venue
2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

External Links

Snippet

Sequential circuits are combinational circuits that are separated by registers. Retiming is considered as the most promising technique for optimizing sequential circuits, that involves moving the edge-triggered registers across the combinational logic without changing the …
Continue reading at www.ecs.umass.edu (PDF) (other versions)

Classifications

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    • G06F17/5081Layout analysis, e.g. layout verification, design rule check
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    • G06F17/5031Timing analysis
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