[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

Yin et al., 2012 - Google Patents

A high-resolution time-to-digital converter based on multi-phase clock implement in field-programmable-gate-array

Yin et al., 2012

Document ID
15056996735453592738
Author
Yin Z
Liu S
Hao X
Gao S
An Q
Publication year
Publication venue
2012 18th IEEE-NPSS Real Time Conference

External Links

Snippet

In this paper, a time-to-digital converter (TDC) based on 4 multi-phase clocks is implemented in a XILINX's Virtex4 FPGA. Profit from the PLL technology we can adjust the clock phase precisely. In this case, 4 multi-phase clocks have the 0°, 90°, 180°, 270° phase …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R13/00—Arrangements for displaying electric variables or waveforms
    • G01R13/02—Arrangements for displaying electric variables or waveforms for displaying measured electric variables in digital form
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating pulses not covered by one of the other main groups in this subclass
    • H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques

Similar Documents

Publication Publication Date Title
Song et al. A high-resolution time-to-digital converter implemented in field-programmable-gate-arrays
Wang et al. A 3.0-ps rms precision 277-MSamples/s throughput time-to-digital converter using multi-edge encoding scheme in a Kintex-7 FPGA
Balla et al. The characterization and application of a low resource FPGA-based time to digital converter
Stricker-Shaver et al. Novel calibration method for switched capacitor arrays enables time measurements with sub-picosecond resolution
Yonggang et al. A linear time-over-threshold digitizing scheme and its 64-channel DAQ prototype design on FPGA for a continuous crystal PET detector
Jansson et al. Synchronization in a multilevel CMOS time-to-digital converter
Yin et al. A high-resolution time-to-digital converter based on multi-phase clock implement in field-programmable-gate-array
Perktold et al. A multichannel time-to-digital converter ASIC with better than 3 ps RMS time resolution
Wang et al. A 256-channel multi-phase clock sampling-based time-to-digital converter implemented in a Kintex-7 FPGA
Szplet Time-to-digital converters
Perktold et al. A fine time-resolution (≪ 3 ps-rms) time-to-digital converter for highly integrated designs
CN108736885B (en) Phase-locked loop clock edge triggered clock phase-splitting method
Yao et al. Design of time interval generator based on hybrid counting method
Qin et al. Design and performance of a 16-channel coarse-fine TDC prototype ASIC
CN108768388B (en) Edge-triggered clock phase splitting method for series phase-locked loops
CN108732912A (en) Clock Phase Splitting Method Triggered by the Edge of the Tested Signal
Xiang et al. A 56-ps multi-phase clock time-to-digital convertor based on Artix-7 FPGA
Prasad et al. A four channel time-to-digital converter ASIC with in-built calibration and SPI interface
Soni et al. Comparative study of delay line based time to digital converter using FPGA
Chen et al. A PVT insensitive field programmable gate array time-to-digital converter
Vornicu et al. Wide range 8ps incremental resolution time interval generator based on FPGA technology
Chen et al. A coarse-fine time-to-digital converter
Mäntyniemi An integrated CMOS high precision time-to-digital converter based on stabilised three-stage delay line interpolation
Bayer et al. A high-resolution (< 10 ps RMS) 32-channel time-to-digital converter (TDC) implemented in a field programmable gate array (FPGA)
Lusardi et al. FPGA-based multi-phase shift-clock fast-counter time-to-digital converter for extremely-large number of channels