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Altaber et al., 1985 - Google Patents

Multi-microprocessor architecture for the LEP storage ring controls

Altaber et al., 1985

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Document ID
1275499499726994796
Author
Altaber J
Innocenti P
Rausch R
Publication year
Publication venue
IFAC Proceedings Volumes

External Links

Snippet

Abstract The new CERN Large Electron Positron (LEP) storage ring control system follows the concepts developed for the Super Proton Synchrotron (SPS) accelerator but making use of present day technology. A multi-tasking computer is replaced by an assembly of …
Continue reading at cds.cern.ch (PDF) (other versions)

Classifications

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    • G06F9/46—Multiprogramming arrangements
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    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
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