8000 Commits · jameslzhu/riscv-card · GitHub

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Commits

Commits on Nov 11, 2024

Fix RV32A atomic instructions

splinedrive
authored and
jameslzhu
committed
Fix mulh instruction spelling
jameslzhu
committed
Fix sltu/sltiu note
jameslzhu
committed

Commits on Nov 3, 2024

Commits on Sep 10, 2024

Add compile instructions to README
jameslzhu
committed

Commits on Apr 20, 2022

Update README.md
jameslzhu
authored

Commits on Oct 28, 2021

Fix register conventions for sp & tp (#16)
jameslzhu
committed

Commits on Feb 16, 2021

Fix bge description (fixes #11)
jameslzhu
committed

Commits on Dec 21, 2020

Fix register conventions for sp & tp
martonbognar
committed

Commits on Nov 17, 2020

Update README.md
jameslzhu
authored

Commits on Aug 14, 2020

Add contribution / style guidelines to README.md
jameslzhu
committed

Commits on Apr 17, 2020

Commits on Jan 2, 2020

Commits on Dec 13, 2019

Fix opcodes for srl and sra
timor
committed

Commits on Sep 3, 2019

Merge pull request #8 from moy/f3-func3
jameslzhu
authored

Commits on Aug 31, 2019

F5 -> funct5 in table headers
moy
committed
F7 -> funct7 in table headers
moy
committed
fix F3 field for xori, ori, andi

moy
authored and
jameslzhu
committed

Commits on Aug 26, 2019

F3 -> funct3 in table headers
moy
committed

Commits on Jul 22, 2019

Merge pull request #7 from emoon/r-type-fixes
jameslzhu
authored

Commits on Jul 19, 2019

Fixed opcode values for R-Type
emoon
committed

Commits on Feb 16, 2019

Create .travis.yml (#6)

chatelao
authored and
jameslzhu
committed

Commits on Jan 30, 2019

Fix #4 (flw typo in c equiv)
jameslzhu
committed

Commits on Oct 28, 2018

Add my name (and stuff)
jameslzhu
committed

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