8000 [Integrate] Crash in pipeline_arm_sme_streaming_mode_tests · Issue #20928 · iree-org/iree · GitHub
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hanhanW opened this issue May 29, 2025 · 2 comments · Fixed by #20948
Closed

[Integrate] Crash in pipeline_arm_sme_streaming_mode_tests #20928

hanhanW opened this issue May 29, 2025 · 2 comments · Fixed by #20948
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@rkayaith @hanhanW
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bug 🐞 Something isn't working codegen/llvm LLVM code generation compiler backend

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@hanhanW
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hanhanW commented May 29, 2025

Identified that llvm/llvm-project#140808 breaks the pipeline test.

iree/compiler/src/iree/compiler/Codegen/LLVMCPU/test/pipeline_arm_sme_streaming_mode_tests.mlir

Lines 77 to 109 in a6e8126

#pipeline_layout = #hal.pipeline.layout<constants = 1, bindings = [
#hal.pipeline.binding<storage_buffer>,
#hal.pipeline.binding<storage_buffer>,
#hal.pipeline.binding<storage_buffer>
]>
module {
module {
func.func @scalable_dispatch_using_za() attributes {hal.executable.target = #hal.executable.target<"llvm-cpu", "embedded-elf-arm_64", {cpu_features = "+sve,+sme", data_layout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128", native_vector_size = 16 : index, target_triple = "aarch64-none-elf"}>,
translation_info = #iree_codegen.translation_info<pipeline = CPUDoubleTilingExpert>} {
%c0 = arith.constant 0 : index
%c1 = arith.constant 1 : index
%cst = arith.constant 0.000000e+00 : f32
%0 = hal.interface.constant.load layout(#pipeline_layout) ordinal(0) : i32
%1 = hal.interface.binding.subspan layout(#pipeline_layout) binding(2) alignment(64) offset(%c0) : !iree_tensor_ext.dispatch.tensor<readwrite:tensor<100x100xf32>>
%2 = tensor.empty() : tensor<100x100xf32>
%3 = linalg.fill {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[0, 0], [[4], [4]], [0, 0], [0, 0]]>}
ins(%cst : f32) outs(%2 : tensor<100x100xf32>) -> tensor<100x100xf32>
iree_tensor_ext.dispatch.tensor.store %3, %1, offsets = [0, 0], sizes = [100, 100], strides = [100, 1] : tensor<100x100xf32> -> !iree_tensor_ext.dispatch.tensor<readwrite:tensor<100x100xf32>>
return
}
}
}
/// A dispatch region that uses ArmSME operations (that require the ZA state)
/// should ways have streaming mode and ZA enabled.
// CHECK: @scalable_dispatch_using_za
// CHECK-SAME: arm_locally_streaming
// CHECK-SAME: arm_new_za
// FORCE-ARM-STREAMING: @scalable_dispatch_using_za
// FORCE-ARM-STREAMING-SAME: arm_locally_streaming
// FORCE-ARM-STREAMING-SAME: arm_new_za

I failed to create an upstream repro, but here is a small repro in IREE: iree-opt --iree-convert-to-llvm repro.mlir

func.func @foo(%2: memref<100x100xf32>, %3: index, %8: index) -> memref<?x?xf32, strided<[100, 1], offset: ?>> {
  %c100 = arith.constant 100 : index
  %vscale = vector.vscale
  %c4 = arith.constant 4 : index
  %c4_vscale = arith.muli %vscale, %c4 : index
  %5 = arith.subi %c100, %3 : index
  %6 = arith.cmpi slt, %5, %c4_vscale : index
  %7 = arith.select %6, %5, %c4_vscale : index
  %10 = arith.subi %c100, %8 : index
  %11 = arith.cmpi slt, %10, %c4_vscale : index
  %12 = arith.select %11, %10, %c4_vscale : index
  %subview = memref.subview %2[%3, %8] [%7, %12] [1, 1] : memref<100x100xf32> to memref<?x?xf32, strided<[100, 1], offset: ?>>
  return %subview : memref<?x?xf32, strided<[100, 1], offset: ?>>
}

It generates a remark about func op conversion, but it still triggers the error.

If you're looking for a "valid" repro, here is the one:

module {
  func.func @scalable_dispatch_using_za() attributes {arm_locally_streaming, arm_new_za, hal.executable.target = #hal.executable.target<"llvm-cpu", "embedded-elf-arm_64", {cpu_features = "+sve,+sme", data_layout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128", native_vector_size = 16 : index, target_triple = "aarch64-none-elf"}>, translation_info = #iree_codegen.translation_info<pipeline = CPUDoubleTilingExpert>} {
    %0 = arm_sme.get_tile : vector<[4]x[4]xf32>
    %c1 = arith.constant 1 : index
    %c0 = arith.constant 0 : index
    %1 = builtin.unrealized_conversion_cast %c0 : index to i64
    %c4 = arith.constant 4 : index
    %c100 = arith.constant 100 : index
    "arm_sme.intr.zero"() <{tile_mask = 17 : i32}> : () -> ()
    %2 = hal.interface.binding.subspan layout(<constants = 1, bindings = [#hal.pipeline.binding<storage_buffer>, #hal.pipeline.binding<storage_buffer>, #hal.pipeline.binding<storage_buffer>]>) binding(2) alignment(64) offset(%c0) : memref<100x100xf32>
   memref.assume_alignment %2, 64 : memref<100x100xf32>
    %vscale = vector.vscale
    %c4_vscale = arith.muli %vscale, %c4 : index
    cf.br ^bb1(%c0 : index)
  ^bb1(%3: index):  // 2 preds: ^bb0, ^bb8
    %4 = arith.cmpi slt, %3, %c100 : index
    cf.cond_br %4, ^bb2, ^bb9
  ^bb2:  // pred: ^bb1
    %5 = arith.subi %c100, %3 : index
    %6 = arith.cmpi slt, %5, %c4_vscale : index
    %7 = arith.select %6, %5, %c4_vscale : index
    cf.br ^bb3(%c0 : index)
  ^bb3(%8: index):  // 2 preds: ^bb2, ^bb7
    %9 = arith.cmpi slt, %8, %c100 : index
    cf.cond_br %9, ^bb4, ^bb8
  ^bb4:  // pred: ^bb3
    %10 = arith.subi %c100, %8 : index
    %11 = arith.cmpi slt, %10, %c4_vscale : index
    %12 = arith.select %11, %10, %c4_vscale : index
    %subview = memref.subview %2[%3, %8] [%7, %12] [1, 1] : memref<100x100xf32> to memref<?x?xf32, strided<[100, 1], offset: ?>>
    %13 = builtin.unrealized_conversion_cast %subview : memref<?x?xf32, strided<[100, 1], offset: ?>> to !llvm.struct<(ptr, ptr, i64, array<2 x i64>, array<2 x i64>)>
    %14 = arith.index_cast %7 : index to i64
    %15 = arith.index_cast %c4_vscale : index to i64
    %16 = arith.cmpi slt, %14, %15 : i64
    %17 = arith.select %16, %14, %15 : i64
    %18 = arith.index_cast %17 : i64 to index
    %19 = vector.create_mask %12 : vector<[4]xi1>
    cf.br ^bb5(%c0 : index)
  ^bb5(%20: index):  // 2 preds: ^bb4, ^bb6
    %21 = builtin.unrealized_conversion_cast %20 : index to i64
    %22 = arith.cmpi slt, %20, %18 : index
    cf.cond_br %22, ^bb6, ^bb7
  ^bb6:  // pred: ^bb5
    %23 = llvm.extractvalue %13[1] : !llvm.struct<(ptr, ptr, i64, array<2 x i64>, array<2 x i64>)> 
    %24 = llvm.extractvalue %13[2] : !llvm.struct<(ptr, ptr, i64, array<2 x i64>, array<2 x i64>)> 
    %25 = llvm.getelementptr %23[%24] : (!llvm.ptr, i64) -> !llvm.ptr, f32
    %26 = llvm.mlir.constant(100 : index) : i64
    %27 = llvm.mul %21, %26 : i64
    %28 = llvm.add %27, %1 : i64
    %29 = llvm.getelementptr %25[%28] : (!llvm.ptr, i64) -> !llvm.ptr, f32
    %30 = arith.index_castui %20 : index to i32
    "arm_sme.intr.st1w.horiz"(%19, %29, %30) <{tile_id = 0 : i32}> : (vector<[4]xi1>, !llvm.ptr, i32) -> ()
    %31 = arith.addi %20, %c1 : index
    cf.br ^bb5(%31 : index)
  ^bb7:  // pred: ^bb5
    %32 = arith.addi %8, %c4_vscale : index
    cf.br ^bb3(%32 : index)
  ^bb8:  // pred: ^bb3
    %33 = arith.addi %3, %c4_vscale : index
    cf.br ^bb1(%33 : index)
  ^bb9:  // pred: ^bb1
    return
  }
}

cc @banach-space
@hanhanW hanhanW added bug 🐞 Something isn't working codegen/llvm LLVM code generation compiler backend labels May 29, 2025
@rkayaith
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rkayaith commented May 29, 2025 •
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Here's a slightly smaller IREE repro:

module {
  func.func @foo(%arg0: memref<100x100xf32>, %arg1: index, %arg2: index, %arg3: index, %arg4: index) -> memref<?x?xf32, strided<[100, 1], offset: ?>> {
    %subview = memref.subview %arg0[%arg1, %arg2] [%arg3, %arg4] [1, 1] : memref<100x100xf32> to memref<?x?xf32, strided<[100, 1], offset: ?>>
    return %subview : memref<?x?xf32, strided<[100, 1], offset: ?>>
  }
}

{-#
  external_resources: {
    mlir_reproducer: {
      pipeline: "builtin.module(iree-convert-to-llvm{reassociateFpReductions=false target-data-layout= target-triple=})",
      disable_threading: false,
      verify_each: true
    }
  }
#-}

The issue is at this line containingOp is null as the block argument owning ivArg is unlinked (I assume due to dialect conversion?).
https://github.com/llvm/llvm-project/blob/945e7d33e803a0a2d9597bf2715f6370110c2dea/mlir/lib/Dialect/Affine/IR/AffineOps.cpp#L2669-L2670

A quick fix is to just use dyn_cast_if_present there instead, though I don't think it'll be easy to make an upstream test for this.

The debug logs help give an idea of what's happening:

$ iree-opt --run-reproducer smaller-repro.mlir  -debug- -debug-

//===-------------------------------------------===//
Legalizing operation : 'builtin.module'(0x63ba661b5d00) {
} -> SUCCESS : operation marked legal by the target
//===-------------------------------------------===//

//===-------------------------------------------===//
Legalizing operation : 'func.func'(0x63ba661e97c0) {
  * Fold {
  } -> FAILURE : unable to fold

  * Pattern : 'func.func -> ()' {
Trying to match "mlir::iree_compiler::(anonymous namespace)::ConvertHALEntryPointFuncOp"
...
"mlir::iree_compiler::(anonymous namespace)::ConvertHALEntryPointFuncOp" result 0
  } -> FAILURE : pattern failed to match

  * Pattern : 'func.func -> ()' {
Trying to match "(anonymous namespace)::FuncOpConversion"
    ** Insert  : 'llvm.func'(0x63ba662ac700)
    ** Insert Block into : 'llvm.func'(0x63ba662ac700)
    ** Insert Block into : 'llvm.func'(0x63ba662ac700)
    ** Erase   : 'func.func'(0x63ba661e97c0)
"(anonymous namespace)::FuncOpConversion" result 1

    //===-------------------------------------------===//
    Legalizing operation : 'llvm.func'(0x63ba662ac700) {
    } -> SUCCESS : operation marked legal by the target
    //===-------------------------------------------===//
  } -> SUCCESS : pattern applied successfully
// *** IR Dump After Pattern Application ***
"builtin.module"() ({
  "llvm.func"() <{CConv = #llvm.cconv<ccc>, function_type = !llvm.func<struct<(ptr, ptr, i64, array<2 x i64>, array<2 x i64>)> (ptr, ptr, i64, i64, i64, i64, i64, i64, i64, i64, i64)>, linkage = #llvm.linkage<external>, sym_name = "foo", visibility_ = 0 : i64}> ({
  ^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr, %arg2: i64, %arg3: i64, %arg4: i64, %arg5: i64, %arg6: i64, %arg7: i64, %arg8: i64, %arg9: i64, %arg10: i64):
    %0 = "memref.subview"(<<UNKNOWN SSA VALUE>>, <<UNKNOWN SSA VALUE>>, <<UNKNOWN SSA VALUE>>, <<UNKNOWN SSA VALUE>>, <<UNKNOWN SSA VALUE>>) <{operandSegmentSizes = array<i32: 1, 2, 2, 0>, static_offsets = array<i64: -9223372036854775808, -9223372036854775808>, static_sizes = array<i64: -9223372036854775808, -9223372036854775808>, static_strides = array<i64: 1, 1>}> : (memref<100x100xf32>, index, index, index, index) -> memref<?x?xf32, strided<[100, 1], offset: ?>>
    "func.return"(%0) : (memref<?x?xf32, strided<[100, 1], offset: ?>>) -> ()
  }) : () -> ()
  "func.func"() <{function_type = (memref<100x100xf32>, index, index, index, index) -> memref<?x?xf32, strided<[100, 1], offset: ?>>, sym_name = "foo"}> ({
  }) : () -> ()
}) {llvm.data_layout = "", llvm.target_triple = ""} : () -> ()


} -> SUCCESS
//===-------------------------------------------===//

//===-------------------------------------------===//
Legalizing operation : 'memref.subview'(0x63ba660d6750) {
  %0 = "memref.subview"(<<UNKNOWN SSA VALUE>>, <<UNKNOWN SSA VALUE>>, <<UNKNOWN SSA VALUE>>, <<UNKNOWN SSA VALUE>>, <<UNKNOWN SSA VALUE>>) <{operandSegmentSizes = array<i32: 1, 2, 2, 0>, static_offsets = array<i64: -9223372036854775808, -9223372036854775808>, static_sizes = array<i64: -9223372036854775808, -9223372036854775808>, static_strides = array<i64: 1, 1>}> : (memref<100x100xf32>, index, index, index, index) -> memref<?x?xf32, strided<[100, 1], offset: ?>>

  * Fold {
  } -> FAILURE : unable to fold

  * Pattern : 'memref.subview -> ()' {
Trying to match "(anonymous namespace)::SubViewOpLowering"
    ** Failure : subview operations should have been expanded beforehand
"(anonymous namespace)::SubViewOpLowering" result 0
  } -> FAILURE : pattern failed to match

  * Pattern : 'memref.subview -> ()' {
Trying to match "(anonymous namespace)::SubviewFolder"
    ** Insert  : 'memref.extract_strided_metadata'(0x63ba661eda00)
iree-opt: /home/rkayaith/repos/iree/third_party/llvm-project/llvm/include/llvm/Support/Casting.h:662: decltype(auto) llvm::dyn_cast(From *) [To = mlir::affine::AffineParallelOp, From = mlir::Operation]: Assertion `detail::isPresent(Val) && "dyn_cast on a non-existent value"' failed.
Please report issues to https://github.com/iree-org/iree/issues and include the crash backtrace.
Stack dump:
0.      Program arguments: iree-opt --run-reproducer smaller-repro.mlir -debug- -debug-
 #0 0x000074c55e5654b7 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) /home/rkayaith/repos/iree/third_party/llvm-project/llvm/lib/Support/Unix/Signals.inc:804:13
 #1 0x000074c55e5636f0 llvm::sys::RunSignalHandlers() /home/rkayaith/repos/iree/third_party/llvm-project/llvm/lib/Support/Signals.cpp:106:18
 #2 0x000074c55e565bc5 SignalHandler(int, siginfo_t*, void*) /home/rkayaith/repos/iree/third_party/llvm-project/llvm/lib/Support/Unix/Signals.inc:0:3
 #3 0x000074c557242520 (/lib/x86_64-linux-gnu/libc.so.6+0x42520)
 #4 0x000074c5572969fc __pthread_kill_implementation ./nptl/./nptl/pthread_kill.c:44:76
 #5 0x000074c5572969fc __pthread_kill_internal ./nptl/./nptl/pthread_kill.c:78:10
 #6 0x000074c5572969fc pthread_kill ./nptl/./nptl/pthread_kill.c:89:10
 #7 0x000074c557242476 gsignal ./signal/../sysdeps/posix/raise.c:27:6
 #8 0x000074c5572287f3 abort ./stdlib/./stdlib/abort.c:81:7
 #9 0x000074c55722871b _nl_load_domain ./intl/./intl/loadmsgcat.c:1177:9
#10 0x000074c557239e96 (/lib/x86_64-linux-gnu/libc.so.6+0x39e96)
#11 0x000074c562dc2d23 mlir::Operation::getRegion(unsigned int) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/include/mlir/IR/Operation.h:687:5
#12 0x000074c562dc2d23 mlir::affine::AffineParallelOp::getRegion() /home/rkayaith/repos/iree/build/llvm-project/tools/mlir/include/mlir/Dialect/Affine/IR/AffineOps.h.inc:2974:21
#13 0x000074c562dc2d23 mlir::affine::AffineParallelOp::getBody() /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Dialect/Affine/IR/AffineOps.cpp:3910:46
#14 0x000074c562dc2d23 mlir::affine::AffineParallelOp::getIVs() /home/rkayaith/repos/iree/build/llvm-project/tools/mlir/include/mlir/Dialect/Affine/IR/AffineOps.h.inc:3079:12
#15 0x000074c562dc2d23 mlir::affine::getAffineParallelInductionVarOwner(mlir::Value) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Dialect/Affine/IR/AffineOps.cpp:2671:51
#16 0x000074c562db4ead mlir::affine::isAffineParallelInductionVar(mlir::Value) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Dialect/Affine/IR/AffineOps.cpp:2647:50
#17 0x000074c562db4ead mlir::affine::isAffineInductionVar(mlir::Value) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Dialect/Affine/IR/AffineOps.cpp:2651:42
#18 0x000074c562db4ead mlir::affine::isValidDim(mlir::Value) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Dialect/Affine/IR/AffineOps.cpp:299:7
#19 0x000074c562db9eeb void legalizeDemotedDims<mlir::AffineMap>(mlir::AffineMap&, llvm::SmallVectorImpl<mlir::Value>&) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Dialect/Affine/IR/AffineOps.cpp:1416:48
#20 0x000074c562db9eeb void canonicalizeMapOrSetAndOperands<mlir::AffineMap>(mlir::AffineMap*, llvm::SmallVectorImpl<mlir::Value>*) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Dialect/Affine/IR/AffineOps.cpp:1451:3
#21 0x000074c562db9eeb mlir::affine::canonicalizeMapAndOperands(mlir::AffineMap*, llvm::SmallVectorImpl<mlir::Value>*) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Dialect/Affine/IR/AffineOps.cpp:1518:3
#22 0x000074c562db7797 composeAffineMapAndOperands(mlir::AffineMap*, llvm::SmallVectorImpl<mlir::Value>*) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Dialect/Affine/IR/AffineOps.cpp:1162:28
#23 0x000074c562db78ef mlir::AffineMap::operator bool() const /home/rkayaith/repos/iree/third_party/llvm-project/mlir/include/mlir/IR/AffineMap.h:132:47
#24 0x000074c562db78ef mlir::affine::makeComposedAffineApply(mlir::OpBuilder&, mlir::Location, mlir::AffineMap, llvm::ArrayRef<mlir::OpFoldResult>) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Dialect/Affine/IR/AffineOps.cpp:1180:3
#25 0x000074c562db7a70 mlir::affine::makeComposedFoldedAffineApply(mlir::OpBuilder&, mlir::Location, mlir::AffineMap, llvm::ArrayRef<mlir::OpFoldResult>) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Dialect/Affine/IR/AffineOps.cpp:1239:7
#26 0x000074c562db7e63 mlir::affine::makeComposedFoldedAffineApply(mlir::OpBuilder&, mlir::Location, mlir::AffineExpr, llvm::ArrayRef<mlir::OpFoldResult>) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Dialect/Affine/IR/AffineOps.cpp:1263:10
#27 0x000074c561bd0d00 (anonymous namespace)::resolveSubviewStridedMetadata(mlir::RewriterBase&, mlir::memref::SubViewOp) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Dialect/MemRef/Transforms/ExpandStridedMetadata.cpp:116:7
#28 0x000074c561bd0560 llvm::LogicalResult::failed() const /home/rkayaith/repos/iree/third_party/llvm-project/llvm/include/llvm/Support/LogicalResult.h:43:43
#29 0x000074c561bd0560 llvm::failed(llvm::LogicalResult) /home/rkayaith/repos/iree/third_party/llvm-project/llvm/include/llvm/Support/LogicalResult.h:71:58
#30 0x000074c561bd0560 (anonymous namespace)::SubviewFolder::matchAndRewrite(mlir::memref::SubViewOp, mlir::PatternRewriter&) const /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Dialect/MemRef/Transforms/ExpandStridedMetadata.cpp:195:9
#31 0x000074c562bd21d6 mlir::PatternApplicator::matchAndRewrite(mlir::Operation*, mlir::PatternRewriter&, llvm::function_ref<bool (mlir::Pattern const&)>, llvm::function_ref<void (mlir::Pattern const&)>, llvm::function_ref<llvm::LogicalResult (mlir::Pattern const&)>)::$_2::operator()() const /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Rewrite/PatternApplicator.cpp:212:13
#32 0x000074c562bd21d6 void llvm::function_ref<void ()>::callback_fn<mlir::PatternApplicator::matchAndRewrite(mlir::Operation*, mlir::PatternRewriter&, llvm::function_ref<bool (mlir::Pattern const&)>, llvm::function_ref<void (mlir::Pattern const&)>, llvm::function_ref<llvm::LogicalResult (mlir::Pattern const&)>)::$_2>(long) /home/rkayaith/repos/iree/third_party/llvm-project/llvm/include/llvm/ADT/STLFunctionalExtras.h:46:12
#33 0x000074c562bcf2af mlir::PatternApplicator::matchAndRewrite(mlir::Operation*, mlir::PatternRewriter&, llvm::function_ref<bool (mlir::Pattern const&)>, llvm::function_ref<void (mlir::Pattern const&)>, llvm::function_ref<llvm::LogicalResult (mlir::Pattern const&)>) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Rewrite/PatternApplicator.cpp:233:9
#34 0x000074c562b95ebe (anonymous namespace)::OperationLegalizer::legalize(mlir::Operation*, mlir::ConversionPatternRewriter&) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Transforms/Utils/DialectConversion.cpp:0:0
#35 0x000074c562b95047 mlir::OperationConverter::convert(mlir::ConversionPatternRewriter&, mlir::Operation*) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Transforms/Utils/DialectConversion.cpp:0:0
#36 0x000074c562b9609f llvm::LogicalResult::failed() const /home/rkayaith/repos/iree/third_party/llvm-project/llvm/include/llvm/Support/LogicalResult.h:43:43
#37 0x000074c562b9609f llvm::failed(llvm::LogicalResult) /home/rkayaith/repos/iree/third_party/llvm-project/llvm/include/llvm/Support/LogicalResult.h:71:58
#38 0x000074c562b9609f mlir::OperationConverter::convertOperations(llvm::ArrayRef<mlir::Operation*>) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Transforms/Utils/DialectConversion.cpp:2696:9
#39 0x000074c562b9b86b mlir::applyPartialConversion(llvm::ArrayRef<mlir::Operation*>, mlir::ConversionTarget const&, mlir::FrozenRewritePatternSet const&, mlir::ConversionConfig) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Transforms/Utils/DialectConversion.cpp:3388:22
#40 0x000074c562b9b86b mlir::applyPartialConversion(mlir::Operation*, mlir::ConversionTarget const&, mlir::FrozenRewritePatternSet const&, mlir::ConversionConfig) /home/rkayaith/repos/iree/third_party/llvm-project/mlir/lib/Transforms/Utils/DialectConversion.cpp:3394:10
#41 0x000074c55fbb4d17 mlir::iree_compiler::(anonymous namespace)::ConvertToLLVMPass::runOnOperation() /home/rkayaith/repos/iree/compiler/src/iree/compiler/Codegen/LLVMCPU/ConvertToLLVM.cpp:1095:14

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hanhanW commented May 29, 2025

Oh, that sounds reasonable to me, and it does fix the issue. Thanks for looking at this! Let me try to send a fix and see how upstream folks think.

@hanhanW hanhanW mentioned this issue May 29, 2025
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@hanhanW hanhanW mentioned this issue May 30, 2025
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bug 🐞 Something isn't working codegen/llvm LLVM code generation compiler backend
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Integrate llvm-project@587d6fcbb685e3a57 iree-org/iree
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