Description
(Writing this after a synchronous meeting w/ @anshumanmohan so feel free to add to/correct this post).
Support different popping policies
Instead of having a round robin "pop" policy for PIFO tree, PIFO trees should be able to support a different split (e.g., 70/30 or something like that).
PIFO tree can communicate with Static "parent" to determine its popping policy
This was discussed briefly on Monday: we want PIFO trees to communicate with a (parent that can get packet information from the PIFO tree(s) and then do some (hopefully static) calculation, and then send information back to the PIFO tree to update its popping policy (e.g., go from 70/30 to round robin or something like that).
Drawing is below. We'll start with a parent and just one PIFO tree child, but could possibly add more since this is more realistic iiuc.
Hopefully, the parent's calculations are simple enough to be static; we would need this to talk about the "mixed static dynamic" story for the paper.
One interesting note is that this is similar to the systolic array stuff I've been doing.
In both cases, we have one static component (the systolic array/Parent) and a dynamic component (the post op component/PIFO tree). And in both cases, we need to run them both kind of in parallel1 and they need to communicate with each other. I think I have a general idea of how to do this in the Systolic Array case; hopefully doing this with systolic arrays will make it easier to do with PIFO trees?
Concurrent pushes and pops
This needs more thinking. For example, what happens if we pop while pushing something that would have ended up being the head of the PIFO tree?
Another thing: if I understood correctly, @anshumanmohan's PIFO tree paper didn't allow concurrent pushes/pops, so maybe for now we can focus on the first two things, since they're more concrete?
If anyone wants to elaborate or correct anything I said, lmk.
Footnotes
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Systolic Array & Post op need to run in parallel since we want to start the post op on a PE as soon as the given Data is ready (which means some of parts of the systolic array are still calculating) ↩