8000 When accessing out of range on a custom type ,SIM Crashes with Caught signal 11 (SEGV_MAPERR) · Issue #1145 · nickg/nvc · GitHub 8000
[go: up one dir, main page]
More Web Proxy on the site http://driver.im/
Skip to content
When accessing out of range on a custom type ,SIM Crashes with Caught signal 11 (SEGV_MAPERR) #1145
Closed
@alpkoyun

Description

@alpkoyun

Hi,

I have encountered a bug where simulation craches with " Caught signal 11 (SEGV_MAPERR)". It gives no other error message syntax issue etc. I tracked down the cause to accessing out of range on a custom type like below. In the code below, the range of state_array is 0 to "read_size -1" . In the for generate, the range 0 to "write_size - 1" is tried to be accessed. when "read_size" is smaller than the "write_size" simulation chashes. I tried the same for the variable "test_out" but it gave the correct range warnings and did not crash. I noticed that the simulation does not crash if you remove the "reset" on the process. I have used cocotb for simulation.

`
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.NUMERIC_STD.all;
library work;

entity nvc_bug is
generic (
read_size : integer := 2;
write_size : integer := 16
);

port (
clk : in std_logic;
reset : in std_logic;

write_en     : in std_logic_vector(write_size -1 downto 0);
test_out : out std_logic_vector(write_size -1 downto 0)

);
end nvc_bug;

architecture Behavioral of nvc_bug is
-- Attribute definitions
type state_t is (idle, test_0, test_1, test_2, test_3);
type state_array_t is array (0 to read_size - 1) of state_t;
signal state_array : state_array_t;

begin

bug_generator: for i in 0 to write_size - 1 generate

process (clk)
begin
    if rising_edge(clk) then
        if(reset = '1')then
            state_array(i) <= idle;
            test_out(i) <= '0';
        else
            case state_array(i) is
                when idle =>
                    if(write_en(i) = '1')then
                        state_array(i) <= test_0;
                        test_out(i) <= '1';
                    else
                        state_array(i) <= idle;
                        test_out(i) <= '0';
                    end if;
                when test_0 =>
                    state_array(i) <= test_1;
                    test_out(i) <= '1';
                when test_1 =>
                    state_array(i) <= test_2;
                    test_out(i) <= '0';
                when test_2 =>
                    state_array(i) <= test_3;
                    test_out(i) <= '1';
                when test_3 =>
                    state_array(i) <= idle;
                    test_out(i) <= '0';
            
                when others =>
                    
            
            end case;
        end if;
    end if;
end process;

end generate;

end Behavioral;
`

Metadata

Metadata

Assignees

No one assigned

    Labels

    No labels
    No labels

    Projects

    No projects

    Milestone

    No milestone

    Relationships

    None yet

    Development

    No branches or pull requests

    Issue actions

      0