Search Results

The real time dialect of VDM, called VDM-RT, contains constructs for describing concurrent threads, synchronisation of such threads and the distribution of object instances and their threads over multiple CPUs with busses connecting them. Tools that ...

Traditional single-core processors and multiprocessors architectures encounter some problems which are high heat generation, high cost to produce and high power consumption. In this paper, a model to achieve low power consumption by using several ...

Hard real-time embedded systems have stringent timing constraints that must be met in order to ensure the correct functioning of the system. In many cases, these systems are composed of several CPU-bound tasks, which may need to rely on multiple ...

The use of multiple processors give rise to new issues regarding old problems of the Ada95 design.In this paper we discuss how serviceing of protected actions, due to unspecified dispatching, can lead to unbounded priority inversion in systems with ...

We present AMOEBA: a single-chip asynchronous multiprocessor optoelectronic bit-sliced arrayed crossbar switch intended to provide switched interconnection between multiple processors in a distributed computing environment. AMOEBA relies on ...

Fault simulation is a compute intensive problem. Data parallel simulation on multiple processors is one method to reduce fault simulation time. We discuss a novel technique to partition the fault set for data parallel fault simulation. When applied ...

The PERFORM matching method, introduced by B. Modayur and I.G. Shapiro (1994), solves the recognition problem under a bounded error noise model by establishing correspondences between model and image features. PERFORM evaluates correspondences by ...

A continuous stream of event data describing the progress of parallel program execution is realized for trace-driven analysis. Unfortunately, it is often the case that separate streams are produced independently by multiple processors in the system, and ...

This paper presents a proposed hardware solution using an existing multi-stage switching network for synchronizing N multiple processors at predetermined programmable barriers. The technique permits all N processors to access the network simultaneously ...

The Parallel Ada Run-Time System (PARTS), developed at TUB, is the target of an experimental translator that maps sequential Ada to a shared-memory multi-processor. Other modules of the parallel compiler are not explained. The paper summarizes the multi-...

A parallel sort-merge-join algorithm which uses a divide-and-conquer approach to address the data skew problem is proposed. The proposed algorithm adds an extra, low-cost scheduling phase to the usual sort, transfer, and join phases. During the ...