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- research-articleNovember 2024
Reducing DRAM Latency via In-situ Temperature- and Process-Variation-Aware Timing Detection and Adaption
DAC '24: Proceedings of the 61st ACM/IEEE Design Automation ConferenceArticle No.: 67, Pages 1–6https://doi.org/10.1145/3649329.3656228Long DRAM access latency has a significant impact on modern system performance. However, the improvement of DRAM access latency is limited, as the DRAM vendors reserve considerable timing margins against seldom worst-case conditions. To mitigate such ...
- research-articleMay 2010
Adaptive multi-level block truncation coding for frame memory reduction in LCD overdrive
IEEE Transactions on Consumer Electronics (ITOCE), Volume 56, Issue 2Pages 1130–1136https://doi.org/10.1109/TCE.2010.5506049To reduce frame memory usage in LCD overdrive, block truncation coding (BTC) is commonly used due to its efficient coding and low implementation cost. However, the inherent limitation of BTC causes severe perceptual artifacts and degrades overdrive ...
- research-articleFebruary 2009
High performance overdrive using improved motion adaptive codec in LCD
IEEE Transactions on Consumer Electronics (ITOCE), Volume 55, Issue 1Pages 20–26https://doi.org/10.1109/TCE.2009.4814409To improve overdrive performance in LCD, we present an improved motion adaptive codec (IMAC). The IMAC contains two approaches to improve the motion adaptive codec overdrive (MAC-OD). The first is an advanced hybrid image codec (AHIC) for the efficient ...
- research-articleJuly 2008
Research of factors for the response of LCDs
ICAIT '08: Proceedings of the 2008 International Conference on Advanced Infocomm TechnologyArticle No.: 15, Pages 1–5https://doi.org/10.1145/1509315.1509330Slow response is one of the main restricted factors for the development of LCDs. This paper describes the principle and methods for reducing the response time of LCDs. The total display process is divided into three stages in this paper: the ...