Export Citations
Save this search
Please login to be able to save your searches and receive alerts for new content matching your search criteria.
- research-articleJuly 2024
16.2-μW Super Class-AB OTA with current-reuse technique achieving 130.3-μA/μA FoM
AbstractIn this paper, a single-stage Super Class-AB operational transconductance amplifier (OTA) using current reuse technique is presented. It is based on two scaled current mirrors located at the tail current nodes of input pairs, reusing the current ...
Highlights- Transconductance is enhanced through current reuse by a factor of (1+α).
- Slew rate, open loop gain and gain-bandwidth of the OTA are simulated and analyzed.
- Adaptive biasing and local common mode feedback are utilized.
- research-articleJune 2023
A New Improved Current Splitter OTA with Higher Transconductance and Slew Rate
Wireless Personal Communications: An International Journal (WPCO), Volume 131, Issue 4Pages 2477–2492https://doi.org/10.1007/s11277-023-10547-5AbstractThe focus of an amplifier's design engineer is always on its high gain and bandwidth. While larger transistors can produce higher gains, the trade-off is a narrower bandwidth. On the other hand, increasing an amplifier's DC biassing current ...
- research-articleMay 2023
A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process
- Chua-Chin Wang,
- Lean Karlo S. Tolentino,
- Shao-Wei Lu,
- Oliver Lexter July A. Jose,
- Ralph Gerard B. Sangalang,
- Tzung-Je Lee,
- Pang-Yen Lou,
- Wei-Chih Chang
Integration, the VLSI Journal (INTG), Volume 90, Issue CPages 245–260https://doi.org/10.1016/j.vlsi.2023.02.004AbstractThis paper presents a 2 × VDD mixed-voltage digital output buffer where its slew rate (SR) is automatically adjusted based on PVT (process, voltage, and temperature) detection. The developed buffer is the first to be fabricated using ...
Highlights- First mixed-voltage output buffer fabricated using a 16-nm FinFET CMOS process.
- research-articleJanuary 2023
Design, simulation and comparative analysis of CNTFET based Astable Multivibrator
Analog Integrated Circuits and Signal Processing (KLU-ALOG), Volume 115, Issue 1Pages 33–47https://doi.org/10.1007/s10470-022-02128-6AbstractIn this paper, Astable Multivibrator (AMV) circuits are designed and simulated using pure Carbon Nanotube Field Effect Transistors (CNTFETs) as well as hybrid CNT-CMOS technology, and simulation results are compared with conventional CMOS ...
- research-articleMay 2021
Class-AB Flipped Voltage Follower Cell with High Current Driving Capability and Low Output Resistance for High Frequency Applications
Wireless Personal Communications: An International Journal (WPCO), Volume 118, Issue 1Pages 773–787https://doi.org/10.1007/s11277-020-08043-1AbstractIn this paper, a class-AB flipped voltage follower cell with high current driving capability is proposed. The proposed flipped voltage follower (FVF) cell offers increased current sourcing capability and large input/output voltage swing due to the ...
- letterMarch 2021
A three-stage NMC operational amplifier with enhanced slew rate for switched-capacitor circuits
Analog Integrated Circuits and Signal Processing (KLU-ALOG), Volume 106, Issue 3Pages 697–706https://doi.org/10.1007/s10470-020-01795-7AbstractThis paper presents a new architecture for three-stage operational transconductance amplifiers (OTAs) with a class AB input stage to improve the slew rate. The nested Miller compensation scheme is utilized to stabilize the proposed OTA. A ...
- research-articleOctober 2019
A new step response modeling in CMOS operational amplifiers
Analog Integrated Circuits and Signal Processing (KLU-ALOG), Volume 101, Issue 1Pages 45–55https://doi.org/10.1007/s10470-019-01485-zAbstractSettling time is one of the most important parameters in opamps with feedback. In this article, the step response of the fully differential single stage folded cascade architecture amplifiers is analyzed to investigate the behavior of settling ...
- research-articleSeptember 2019
Continuously controlled and discrete-level charge pumping techniques implemented in SC integrators
Analog Integrated Circuits and Signal Processing (KLU-ALOG), Volume 100, Issue 3Pages 653–661https://doi.org/10.1007/s10470-019-01460-8AbstractThis paper presents two methods to reduce power consumption of switched capacitor (SC) integrators in sigma-delta analog to digital converters. The proposed two methods are based on the passive charge re-distribution technique, injecting charge ...
- articleJuly 2016
Slew rate boosting technique for an upgraded transconductance amplifier
Analog Integrated Circuits and Signal Processing (KLU-ALOG), Volume 88, Issue 1Pages 57–63https://doi.org/10.1007/s10470-016-0745-xIn this paper a slew rate enhancement method using some extra paths in recycling folded cascode (RFC) amplifier is presented. The added transistors are in cut-off region in the small-signal operation and will be automatically turned on during slewing ...
- articleMarch 2016
FinFET Design Considerations Based on Schmitt Trigger with Slew Rate and Gain---Bandwidth Product Analysis
Wireless Personal Communications: An International Journal (WPCO), Volume 87, Issue 1Pages 83–97https://doi.org/10.1007/s11277-015-3027-5The FinFET device technology has become a strong adjunct to Schmitt trigger (ST). ST response to a sluggish input signal with a quick transition time at the output. This paper presents a systematic design of Schmitt trigger using 45 nm FinFET for low ...
- research-articleDecember 2015
Analysis and design of a two-stage amplifier with enhanced performance
Microelectronics Journal (MICROJ), Volume 46, Issue 12Pages 1304–1312https://doi.org/10.1016/j.mejo.2015.10.002A high gain two-stage amplifier is presented in this paper, with detailed theoretical analysis. The proposed topology employs positive resistive-capacitive feedback to introduce an extra left half plane zero to cancel a non-dominant pole at the output ...
- research-articleAugust 2015
A low-power fast transient output capacitor-free adaptively biased LDO based on slew rate enhancement for SoC applications
Microelectronics Journal (MICROJ), Volume 46, Issue 8Pages 740–749https://doi.org/10.1016/j.mejo.2015.06.002In this paper, a highly efficient and fast transient output capacitor-free low-dropout regulator (LDO) presented. The proposed LDO architecture is based on differential transconductance amplifiers pairing with push-pull stage to enable effective output ...
- articleApril 2015
A three-stage class AB operational amplifier with enhanced slew rate for switched-capacitor circuits
Analog Integrated Circuits and Signal Processing (KLU-ALOG), Volume 83, Issue 1Pages 111–118https://doi.org/10.1007/s10470-015-0513-3In this paper, a three-stage class AB operational transconductance amplifier (OTA) with large slew rate is presented. The reversed nested Miller compensation technique is used to stabilize the proposed OTA, allowing the slew rate enhancement to be ...
- articleJune 2014
Embedded capacitor multiplier gain boosting compensation for large-capacitive-load three-stage amplifier with slew rate enhancement
Analog Integrated Circuits and Signal Processing (KLU-ALOG), Volume 79, Issue 3Pages 543–553https://doi.org/10.1007/s10470-014-0296-yAn embedded capacitor multiplier gain boosting compensation (ECMGBC) technique with slew rate enhancement circuit is presented in this paper for a three-stage amplifier. The ECMGBC technique pushes the non-dominant complex poles of the amplifier to high ...
- articleFebruary 2014
A fully on-chip 1-μW capacitor-free low-dropout regulator with adaptive output stage
Analog Integrated Circuits and Signal Processing (KLU-ALOG), Volume 78, Issue 2Pages 353–360https://doi.org/10.1007/s10470-013-0223-7A fully on-chip 1-μW fast-transient response capacitor-free low-dropout regulator (LDO) using adaptive output stage (AOS) is presented in this paper in standard 0.13-μm CMOS process. The AOS circuit is proposed to deliver extra four times of output ...
- articleFebruary 2009
Design of low-power single-stage operational amplifiers based on an optimized settling model
Analog Integrated Circuits and Signal Processing (KLU-ALOG), Volume 58, Issue 2Pages 153–160https://doi.org/10.1007/s10470-008-9226-1Settling behavior of operational amplifiers (opamps) is important in many analog signal-processing applications. In this paper, the analysis of single-stage opamps based on settling time has been performed. A simple yet accurate model for the settling ...