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Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA

Authors:

Shakith Fernando,

Henk CorporaalAuthors Info & Claims

ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 13, Issue 3

Article No.: 40, Pages 1 - 27

https://doi.org/10.1145/1367045.1367049

Published: 25 July 2008 Publication History

Abstract

Future applications for embedded systems demand chip multiprocessor designs to meet real-time deadlines. The large number of applications in these systems generates an exponential number of use-cases. The key design automation challenges are designing systems for these use-cases and fast exploration of software and hardware implementation alternatives with accurate performance evaluation of these use-cases. These challenges cannot be overcome by current design methodologies which are semiautomated, time consuming, and error prone.

In this article, we present a design methodology to generate multiprocessor systems in a systematic and fully automated way for multiple use-cases. Techniques are presented to merge multiple use-cases into one hardware design to minimize cost and design time, making it well suited for fast design-space exploration (DSE) in MPSoC systems. Heuristics to partition use-cases are also presented such that each partition can fit in an FPGA, and all use-cases can be catered for.

The proposed methodology is implemented into a tool for Xilinx FPGAs for evaluation. The tool is also made available online for the benefit of the research community and is used to carry out a DSE case study with multiple use-cases of real-life applications: H263 and JPEG decoders. The generation of the entire design takes about 100 ms, and the whole DSE was completed in 45 minutes, including FPGA mapping and synthesis. The heuristics used for use-case partitioning reduce the design-exploration time elevenfold in a case study with mobile-phone applications.

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Cited By

Wijtvliet MCorporaal HKumar A(2021)CGRA-EAM—Rapid Energy and Area Estimation for Coarse-grained Reconfigurable ArchitecturesACM Transactions on Reconfigurable Technology and Systems10.1145/346887414:4(1-28)Online publication date: 13-Sep-2021
https://dl.acm.org/doi/10.1145/3468874
Nguyen TKumar ANeuendorffer SShannon L(2020)Maximizing the Serviceability of Partially Reconfigurable FPGA Systems in Multi-tenant EnvironmentProceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays10.1145/3373087.3375305(29-39)Online publication date: 23-Feb-2020
https://dl.acm.org/doi/10.1145/3373087.3375305
Karfa CSarkar DMandal C(2019)Verification of parallelising transformations of KPN modelsIET Cyber-Physical Systems: Theory & Applications10.1049/iet-cps.2018.5008Online publication date: 11-Mar-2019
https://doi.org/10.1049/iet-cps.2018.5008
Show More Cited By

Index Terms

Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA
1. Applied computing
  1. Arts and humanities
    1. Architecture (buildings)
      1. Computer-aided design
  2. Physical sciences and engineering
    1. Engineering
      1. Computer-aided design

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems

ACM Transactions on Design Automation of Electronic Systems Volume 13, Issue 3

July 2008

370 pages

ISSN:1084-4309

EISSN:1557-7309

DOI:10.1145/1367045

Issue’s Table of Contents

Copyright © 2008 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Journal Family

ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 25 July 2008

Accepted: 01 March 2008

Revised: 01 February 2008

Received: 01 September 2007

Published in TODAES Volume 13, Issue 3

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Cited By

Wijtvliet MCorporaal HKumar A(2021)CGRA-EAM—Rapid Energy and Area Estimation for Coarse-grained Reconfigurable ArchitecturesACM Transactions on Reconfigurable Technology and Systems10.1145/346887414:4(1-28)Online publication date: 13-Sep-2021
https://dl.acm.org/doi/10.1145/3468874
Nguyen TKumar ANeuendorffer SShannon L(2020)Maximizing the Serviceability of Partially Reconfigurable FPGA Systems in Multi-tenant EnvironmentProceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays10.1145/3373087.3375305(29-39)Online publication date: 23-Feb-2020
https://dl.acm.org/doi/10.1145/3373087.3375305
Karfa CSarkar DMandal C(2019)Verification of parallelising transformations of KPN modelsIET Cyber-Physical Systems: Theory & Applications10.1049/iet-cps.2018.5008Online publication date: 11-Mar-2019
https://doi.org/10.1049/iet-cps.2018.5008
Ammar MBaklouti MPelcat MDesnos KAbid M(2018)Comparing Three Clustering-based Scheduling Methods for Energy-Aware Rapid Design of MP2SoCsJournal of Signal Processing Systems10.5555/3200212.320022290:4(537-570)Online publication date: 1-Apr-2018
https://dl.acm.org/doi/10.5555/3200212.3200222
Papaphilippou PLuk W(2018)Accelerating Database Systems Using FPGAs: A Survey2018 28th International Conference on Field Programmable Logic and Applications (FPL)10.1109/FPL.2018.00030(125-1255)Online publication date: Aug-2018
https://doi.org/10.1109/FPL.2018.00030
Bacivarov IHaid WHuang KThiele L(2018)Methods and Tools for Mapping Process Networks onto Multi-Processor Systems-On-ChipHandbook of Signal Processing Systems10.1007/978-3-319-91734-4_19(685-719)Online publication date: 14-Oct-2018
https://doi.org/10.1007/978-3-319-91734-4_19
Hempel GGoens ACastrillon JAsmus JSbalzarini I(2017)Robust Mapping of Process Networks to Many-Core Systems using Bio-Inspired Design CenteringProceedings of the 20th International Workshop on Software and Compilers for Embedded Systems10.1145/3078659.3078667(21-30)Online publication date: 12-Jun-2017
https://dl.acm.org/doi/10.1145/3078659.3078667
Santos RVenkataraman SKumar A(2017)Scrubbing Mechanism for Heterogeneous Applications in Reconfigurable DevicesACM Transactions on Design Automation of Electronic Systems10.1145/299764622:2(1-26)Online publication date: 9-Feb-2017
https://dl.acm.org/doi/10.1145/2997646
Hahnel MArega FDargie WKhasanov RCastrillon J(2017)Application interference analysis: Towards energy-efficient workload management on heterogeneous micro-server architectures2017 IEEE Conference on Computer Communications Workshops (INFOCOM WKSHPS)10.1109/INFCOMW.2017.8116415(432-437)Online publication date: May-2017
https://doi.org/10.1109/INFCOMW.2017.8116415
Ammar MBaklouti MPelcat MDesnos KAbid M(2017)Comparing Three Clustering-based Scheduling Methods for Energy-Aware Rapid Design of MP2SoCsJournal of Signal Processing Systems10.1007/s11265-017-1261-790:4(537-570)Online publication date: 14-Aug-2017
https://doi.org/10.1007/s11265-017-1261-7
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