Relaxed Reorder Buffer Commit with Batch Context Switch
Authors: 
Md Enamul Haque, S. M. Zobaed, Muhammad Usama Islam, Faaiza Mohammad AreefAuthors Info & Claims
Article No.: 15, Pages 1 - 5
Abstract
Most of the modern processors achieve instruction level parallelism by executing instructions without the original program order. Although the instructions can execute without preserving the original program sequence, they must commit in-order once execution ends.A Reorder Buffer (ROB) is typically used in traditional out-of-order processors to ensure the in-order commitment of the instructions, which has the ability to impede the processor entirely if the head of ROB is obstructed with an instruction. In this paper, we present an alternate approach mechanism for reorder buffer to do out-of-order commit of instructions. The proposed mechanism extends the ROB by adding a Stalled Instruction Zone (SI-Zone) which accommodates batches of dependent instructions and allows out-of-order commit for the ROB. The particular instruction that makes initial stall and other dependent instructions are moved to SI-zone to make way for the normal instructions to commit at the ROB. The SI-zone commits the instructions in batch mode once the stall is cleared. The outcome is an efficient processor that is ROB-based and increases both the effective size of ROB and number of physical registers.
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Published In
January 2020
517 pages
ISBN:9781450377782
DOI:10.1145/3377049
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Published: 20 March 2020
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