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research-article

Making Address-Correlated Prefetching Practical

Published: 01 January 2010 Publication History

Abstract

Despite a decade of research demonstrating its efficacy, address-correlated prefetching has never been implemented in a shipping processor because it requires megabytes of metadata—too large to store practically on chip. New storage-, latency-, and bandwidth-efficient mechanisms for storing metadata off chip yield a practical design that achieves 90 percent of the performance potential of idealized on-chip metadata storage.

Cited By

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  • (2022)MetaSys: A Practical Open-source Metadata Management System to Implement and Evaluate Cross-layer OptimizationsACM Transactions on Architecture and Code Optimization10.1145/350525019:2(1-29)Online publication date: 24-Mar-2022
  • (2021)Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement LearningMICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3466752.3480114(1121-1137)Online publication date: 18-Oct-2021
  • (2021)MxTasks: How to Make Efficient Synchronization and Prefetching EasyProceedings of the 2021 International Conference on Management of Data10.1145/3448016.3457268(1331-1344)Online publication date: 9-Jun-2021
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      Information & Contributors

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      Published In

      cover image IEEE Micro
      IEEE Micro  Volume 30, Issue 1
      January 2010
      114 pages

      Publisher

      IEEE Computer Society Press

      Washington, DC, United States

      Publication History

      Published: 01 January 2010

      Author Tags

      1. address-correlated prefetching
      2. cache memories

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      Cited By

      View all
      • (2022)MetaSys: A Practical Open-source Metadata Management System to Implement and Evaluate Cross-layer OptimizationsACM Transactions on Architecture and Code Optimization10.1145/350525019:2(1-29)Online publication date: 24-Mar-2022
      • (2021)Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement LearningMICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3466752.3480114(1121-1137)Online publication date: 18-Oct-2021
      • (2021)MxTasks: How to Make Efficient Synchronization and Prefetching EasyProceedings of the 2021 International Conference on Management of Data10.1145/3448016.3457268(1331-1344)Online publication date: 9-Jun-2021
      • (2019)Temporal Prefetching Without the Off-Chip MetadataProceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3352460.3358300(996-1008)Online publication date: 12-Oct-2019
      • (2019)Quantifying Memory Underutilization in HPC Systems and Using it to Improve Performance via Architecture SupportProceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3352460.3358267(821-835)Online publication date: 12-Oct-2019
      • (2019)Perceptron-based prefetch filteringProceedings of the 46th International Symposium on Computer Architecture10.1145/3307650.3322207(1-13)Online publication date: 22-Jun-2019
      • (2013)Linearizing irregular memory accesses for improved correlated prefetchingProceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/2540708.2540730(247-259)Online publication date: 7-Dec-2013

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