Performance evaluation of the hitachi SR8000 using SPEC OMP2001 benchmarks

Reviewer: Farnaz Toussi

This paper compares the performance of an eight-way symmetric multiprocessor (SMP), developed by Hitachi, with a Hewlett Packard (HP) and Silicon Graphics (SGI) SMP using the OpenMP version of SPEC2001. The Hitachi system provides a hardware mechanism for handling barriers, and takes advantage of the pseudo-vector processing (PVP) feature of the PowerPC processors. PVP supports the pipelining of memory accesses, similar to a vector supercomputer. With these two features, the system should perform well with memory intensive applications, and those with frequent synchronization. This study, however, shows that compiler implementation and data dependency, as well as fine grain parallelism, can introduce a high enough overhead to eliminate/reduce any performance gain from the PVP and hardware-based synchronization provided by the Hitachi system. In fact, with some of the applications, the Hitachi system performs worse than both the HP and SGI systems. From the limited information provided for the HP and SGI systems, it appears that its large L2 cache is the reason for SGI's superior performance with most of the applications. Overall, the paper is well written and well organized, but the authors do not provide enough detail on the HP and SGI systems. The conclusion of this study reports good scalability and good performance with memory intensive applications for the Hitachi system, but the results do not support this conclusion in most cases. A missing part of the authors' comparison is the scalability of the HP and SGI systems.