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Power supply noise aware workload assignment for multi-core systems

Published: 10 November 2008 Publication History

Abstract

As the industry moves from single- to multi-core processors, the challenges of how to reliably design and analyze power delivery for such systems also arise. We study various workload assignments to cores and their impact on the global power grid noise. We develop metrics to estimate the amount of noise propagated from core to core and propose a power supply noise aware workload assignment method. In our experiments, we show that performance loss can be significant if workload assignment is not properly made.

References

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S. R. Nassif, and O. Fakhouri, "Technology Trends in Power-Grid-Induced Noise," in SLIP, 2002, pp. 55--59.
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Sh. Zhao, K. Roy and Ch. K. Koh, "Decoupling Capacitance Allocation and Its Application to Power-Supply Noise-Aware Floorplanning", IEEE Trans. on Comp-Aided Design of Interg. Circ. and Sys. vol. 21. no 1, January 2002, pp. 81--92.
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Cited By

View all
  • (2018)Exploiting PDN noise to thwart correlation power analysis attacks in 3D ICsProceedings of the 20th System Level Interconnect Prediction Workshop10.1145/3225209.3225212(1-6)Online publication date: 23-Jun-2018
  • (2018)PARMProceedings of the 55th Annual Design Automation Conference10.1145/3195970.3196090(1-6)Online publication date: 24-Jun-2018
  • (2018)A Study of 3-D Power Delivery Networks With Multiple Clock DomainsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.254927524:11(3218-3231)Online publication date: 29-Dec-2018

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Published In

cover image ACM Conferences
ICCAD '08: Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
November 2008
855 pages
ISBN:9781424428205

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IEEE Press

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Published: 10 November 2008

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ASE08
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ASE08: The International Conference on Computer-Aided Design
November 10 - 13, 2008
California, San Jose

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Cited By

View all
  • (2018)Exploiting PDN noise to thwart correlation power analysis attacks in 3D ICsProceedings of the 20th System Level Interconnect Prediction Workshop10.1145/3225209.3225212(1-6)Online publication date: 23-Jun-2018
  • (2018)PARMProceedings of the 55th Annual Design Automation Conference10.1145/3195970.3196090(1-6)Online publication date: 24-Jun-2018
  • (2018)A Study of 3-D Power Delivery Networks With Multiple Clock DomainsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.254927524:11(3218-3231)Online publication date: 29-Dec-2018

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