Accurate and efficient flow based congestion estimation in floorplanning
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Congestion prediction in floorplanning
ASP-DAC '05: Proceedings of the 2005 Asia and South Pacific Design Automation ConferenceRoutability optimization has become the major concern in floorplanning. In traditional floorplanners, area minimization is an important issue. Due to the recent advances in VLSI technology, interconnect has become a dominant factor to the overall ...
Congestion-driven floorplanning with module reshaping
ICC'08: Proceedings of the 12th WSEAS international conference on CircuitsIn this paper, we implement a two-stage congestion-driven floorplanner. In first stage, an area-wire length-oriented method using simulated-annealing (SA) with the conception of ant algorithm (SANTA) was introduced and a congestion-driven module ...
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DATE '03: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1As technology moves into the deep-submicron era, the complexity of VLSI circuit design grows rapidly, especially in the interconnections between modules. Therefore, interconnect optimization has become an important concern in floorplanning today. Most ...
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- IEICE: Institute of Electronics, Information and Communication Engineers
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