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- research-articleAugust 2020
An off-chip attack on hardware enclaves via the memory bus
SEC'20: Proceedings of the 29th USENIX Conference on Security SymposiumArticle No.: 28, Pages 487–504This paper shows how an attacker can break the confidentiality of a hardware enclave with MEMBUSTER, an off-chip attack based on snooping the memory bus. An attacker with physical access can observe an unencrypted address bus and extract fine-grained ...
- research-articleMay 2020
Generating Representative Test Sequences from Real Workload for Minimizing DRAM Verification Overhead
ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 25, Issue 4Article No.: 30, Pages 1–23https://doi.org/10.1145/3391891Dynamic Random Access Memory (DRAM) standards have evolved for higher bandwidth, larger capacity, and lower power consumption, so their specifications have become complicated to satisfy the design goals. These complex implementations have significantly ...
- research-articleDecember 2015
Lowering Minimum Supply Voltage for Power-Efficient Cache Design by Exploiting Data Redundancy
ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 21, Issue 1Article No.: 11, Pages 1–24https://doi.org/10.1145/2795229Voltage scaling is known to be an efficient way of saving power and energy within a system, and large caches such as LLCs are good candidates for voltage scaling considering their constantly increasing size. However, the VCCMIN problem, in which the ...
- research-articleJune 2008
Applying passive RFID system to wireless headphones for extreme low power consumption
DAC '08: Proceedings of the 45th annual Design Automation ConferencePages 486–491https://doi.org/10.1145/1391469.1391594One of major design concerns about wireless headphone is power consumption. In this paper, we propose a novel design for extreme low power headphone implementation by extending the EPC Class-1 Generation 2 RFID protocol for delivering stream data. We ...