Export Citations
Save this search
Please login to be able to save your searches and receive alerts for new content matching your search criteria.
- research-articleDecember 2023
A Semantic-Integrated LSM-Tree-Based Key–Value Storage Engine for Blockchain Systems
- Qian Wei,
- Zehao Chen,
- Xiaowei Chen,
- Yuhao Zhang,
- Xiaojun Cai,
- Zhiping Jia,
- Zhaoyan Shen,
- Yi Wang,
- Zili Shao,
- Bingzhe Li
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCADICS), Volume 43, Issue 6Pages 1794–1807https://doi.org/10.1109/TCAD.2023.3348771Blockchain systems play an important role in distributed ledgers, database systems, etc. As more and more blocks are mined, the storage burden of blockchain system is significantly increased. The current blockchain system uniformly transforms all its data ...
- research-articleDecember 2023
Branch Predictor Design for Energy Harvesting Powered Nonvolatile Processors
IEEE Transactions on Computers (ITCO), Volume 73, Issue 3Pages 722–734https://doi.org/10.1109/TC.2023.3339977Non-volatile processors are proposed for ambient energy harvesting systems to enable accumulative computing across power failures. They employ nonvolatile memory for processor status backup before power outage and resume the system after power recovers. A ...
- research-articleDecember 2023
ChainKV: A Semantics-Aware Key-Value Store for Ethereum System
Proceedings of the ACM on Management of Data (PACMMOD), Volume 1, Issue 4Article No.: 226, Pages 1–23https://doi.org/10.1145/3626713The Log-Structure Merged tree (LSM-tree) based key-value (KV) store has been widely adopted as the storage engine for blockchain systems, such as Ethereum, in which blockchain data are uniformly transformed into randomly distributed KV items for ...
- ArticleSeptember 2023
Analysis of Augmentations in Contrastive Learning for Parkinson’s Disease Diagnosis
Artificial Neural Networks and Machine Learning – ICANN 2023Pages 37–50https://doi.org/10.1007/978-3-031-44216-2_4AbstractParkinson’s disease (PD) is a neurodegenerative disease that causes a movement disorder. Early diagnosis of PD is critical for patients to receive proper treatment, such as levodopa/carbidopa, which are more effective when administered early on at ...
- research-articleSeptember 2023
ASHL: An Adaptive Multi-Stage Distributed Deep Learning Training Scheme for Heterogeneous Environments
- Zhaoyan Shen,
- Qingxiang Tang,
- Tianren Zhou,
- Yuhao Zhang,
- Zhiping Jia,
- Dongxiao Yu,
- Zhiyong Zhang,
- Bingzhe Li
IEEE Transactions on Computers (ITCO), Volume 73, Issue 1Pages 30–43https://doi.org/10.1109/TC.2023.3315847With the increment of data sets and models sizes, distributed deep learning has been proposed to accelerate training and improve the accuracy of DNN models. The parameter server framework is a popular collaborative architecture for data-parallel training, ...
-
- research-articleAugust 2023
A Multiagent Reinforcement Learning-Assisted Cache Cleaning Scheme for DM-SMR
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCADICS), Volume 42, Issue 8Pages 2500–2513https://doi.org/10.1109/TCAD.2022.3222670To support nonsequential writes, persistent cache (PC) is constructed in drive managed SMR (DM-SMR) drive. However, PC cleaning introduces drastic performance degradation and enlarges tail latencies. In this article, we propose to utilize reinforcement ...
- research-articleDecember 2022
Re-LSM: A ReRAM-Based Processing-in-Memory Framework for LSM-Based Key-Value Store
ICCAD '22: Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided DesignArticle No.: 44, Pages 1–9https://doi.org/10.1145/3508352.3549392Log-structured merge (LSM) tree based key-value (KV) stores organize writes into hierarchical batches for high-speed writing. However, the notorious compaction process of LSM-tree severely hurts system performance. It not only involves huge I/O ...
- research-articleJune 2022
PQ-PIM: A pruning–quantization joint optimization framework for ReRAM-based processing-in-memory DNN accelerator
Journal of Systems Architecture: the EUROMICRO Journal (JOSA), Volume 127, Issue Chttps://doi.org/10.1016/j.sysarc.2022.102531AbstractPruning and quantization are two efficient techniques to achieve performance improvement and energy saving for ReRAM-based DNN accelerators. However, most existing ReRAM-based DNN accelerators using pruning and quantization are based ...
- research-articleMay 2022
A Survey of Blockchain Data Management Systems
ACM Transactions on Embedded Computing Systems (TECS), Volume 21, Issue 3Article No.: 25, Pages 1–28https://doi.org/10.1145/3502741Blockchain has been widely deployed in various fields, such as finance, education, and public services. Blockchain has decentralized mechanisms with persistency and auditability and runs as an immutable distributed ledger, where transactions are jointly ...
- research-articleApril 2022
Optimization for deep convolutional neural network of stochastic computing on MLC-PCM-based system
Microprocessors & Microsystems (MSYS), Volume 90, Issue Chttps://doi.org/10.1016/j.micpro.2022.104505AbstractDeep convolutional neural networks (DCNNs) are one of the most promising models for pattern recognition and classification tasks. With the development of wearable devices and the Internet of Things (IoTs), integrating DCNNs onto ...
- research-articleMarch 2022
DQN based page allocation for ReRAM main memory
Microprocessors & Microsystems (MSYS), Volume 89, Issue Chttps://doi.org/10.1016/j.micpro.2022.104450AbstractBenefiting from the characteristics of non-volatile, low leakage power consumption, high density, and good scalability, resistive random access memory (ReRAM) has been considered to replace DRAM as the main memory of embedded devices. ...
- research-articleDecember 2021
Reinforcement Learning-Assisted Cache Cleaning to Mitigate Long-Tail Latency in DM-SMR
2021 58th ACM/IEEE Design Automation Conference (DAC)Pages 103–108https://doi.org/10.1109/DAC18074.2021.9586084DM-SMR adopts Persistent Cache (PC) to accommodate non-sequential write operations. However, the PC cleaning process induces severe long-tail latency. In this paper, we propose to mitigate the tail latency of PC cleaning by using Reinforcement Learning (...
- research-articleAugust 2021
An efficient highly parallelized ReRAM-based architecture for motion estimation of HEVC
Journal of Systems Architecture: the EUROMICRO Journal (JOSA), Volume 117, Issue Chttps://doi.org/10.1016/j.sysarc.2021.102123AbstractMotion estimation (ME) is a high efficiency video coding (HEVC) process for determining motion vectors that describe the blocks transformation direction from one adjacent frame to a future frame in a video sequence. ME is a memory and ...
- research-articleAugust 2021
Fast-convergent federated learning with class-weighted aggregation
Journal of Systems Architecture: the EUROMICRO Journal (JOSA), Volume 117, Issue Chttps://doi.org/10.1016/j.sysarc.2021.102125AbstractRecently, federated learning has attracted great attention due to its advantage of enabling model training in a distributed manner. Instead of uploading data for centralized training, it allows devices to keep local data private and ...
- research-articleApril 2021
Improving CNN performance on FPGA clusters through topology exploration
SAC '21: Proceedings of the 36th Annual ACM Symposium on Applied ComputingPages 126–134https://doi.org/10.1145/3412841.3441893Field Programmable Gate Array (FPGA) platform has been a popular choice for deploying Convolution Neural Networks (CNNs) as a result of its high parallelism and low energy consumption. Due to the limited on-chip computation and storage resources, FPGA ...
- research-articleFebruary 2021
Pearl: Performance-Aware Wear Leveling for Nonvolatile FPGAs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCADICS), Volume 40, Issue 2Pages 274–286https://doi.org/10.1109/TCAD.2020.2998779Since static random access memory (SRAM)-based field-programmable gate array (FPGA) has limited density and comparatively high leakage power, researchers have proposed FPGA architectures based on emerging nonvolatile memories (NVMs) to satisfy the ...
- ArticleSeptember 2020
Optimizing Motion Estimation with an ReRAM-Based PIM Architecture
Wireless Algorithms, Systems, and ApplicationsPages 285–297https://doi.org/10.1007/978-3-030-59016-1_24AbstractMotion estimation (ME) is an HEVC process for determining motion vectors that describe the blocks transformation direction from one frame to a future adjacent frame in a video sequence. ME is a memory and computationally intensive process which ...
- research-articleNovember 2020
PattPIM: a practical ReRAM-based DNN accelerator by reusing weight pattern repetitions
DAC '20: Proceedings of the 57th ACM/EDAC/IEEE Design Automation ConferenceArticle No.: 240, Pages 1–6Weight sparsity has been explored to achieve energy efficiency for Resistive Random-access Memory (ReRAM) based DNN accelerators. However, most existing ReRAM-based DNN accelerators are based on an overidealized crossbar architecture and mainly focus on ...
- research-articleJuly 2020
Applying Multiple Level Cell to Non-volatile FPGAs
ACM Transactions on Embedded Computing Systems (TECS), Volume 19, Issue 4Article No.: 27, Pages 1–22https://doi.org/10.1145/3400885Static random access memory– (SRAM) based field programmable gate arrays (FPGAs) are currently facing challenges of limited capacity and high leakage power. To solve this problem, non-volatile memory (NVM) is proposed as the alternative to build non-...