Aggressive SRAM Voltage Scaling and Error Mitigation for Approximate DNN Inference
Pages 28 - 34
Abstract
Reducing the power consumption of embedded devices is a well-known problem that has long been continuously investigated, even before the advent of wearable technology. In general, the software techniques' contribution to the history of low-power design can be summarized as making the program codes run faster. Recently emerging DNN-based applications on wearable devices allow multiple new ways to reduce power by leveraging the various power-performance trade-offs. One way to induce the trade-off is scaling down the supply voltage of the main memory. In this paper, we propose aggressively scaling down SRAM supply voltage and designing a bit-error mitigation framework to maintain DNN performance under low-voltage operation. We provide evidence showing the possibility of reducing power consumption while preserving the accuracy of a DNN classification model.
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Index Terms
- Aggressive SRAM Voltage Scaling and Error Mitigation for Approximate DNN Inference
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Published In
October 2023
38 pages
ISBN:9798400703430
DOI:10.1145/3615592
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Published: 02 October 2023
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ACM MobiCom '23
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ACM MobiCom '23: The 29th Annual International Conference on Mobile Computing and Networking
October 6, 2023
Madrid, Spain
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