Diagrammatic function description of microprocessor and data-flow processor
Abstract
This paper discusses a description technique for various kinds of processors. This technique is based on the Symbolic Functional Description Language, which allows logic designers to describe the behavior of hardwares at the register-transfer level in the top-down approach. The SFDL has been applied to the description of the internal behavior of a microprocessor and a data-flow processor.
As a result, the SFDL has made it possible to describe the instruction set and the behavior of processors correctly in comprehensible diagrams. The SFDL has been proved to be suitable for the description of data-flow processors.
References
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J.R.Duley et al.,"A Digital System Design Language", IEEE Trans. on Computer, vol.C-}7 No.9, 1 968
[2]
M.R.Barbacci, "Instruction Set Processor Specifications (ISPS) : The Notation and Its Applications", IEEE Trans. on Computer, vol.C-30 No.}, 198l
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G.L.Smith et al., "Boolean Comparison of Hardware and Flowcharts", IBM J. Res. Develop. vol.26 No.I, Jan.}982
[4]
G.Odawara et al.,"A Symbolic Functional Description Language", 2} th DAC Proc. } 984
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Y.Kita et al., "68000 Micro Computer", Micro Computer Series No.}4, Maruzen, }')83
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H.Kurokawa et al., "The Architecture and performance of Image Pipeline Processor", Proc. of VLSI '83 Int'l Conf., }983
Index Terms
- Diagrammatic function description of microprocessor and data-flow processor
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Published: 01 June 1985
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