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A design by example regular structure generator

Authors:

Cyrus S. Bamji,

Charles E. Hauck,

Jonathan AllenAuthors Info & Claims

DAC '85: Proceedings of the 22nd ACM/IEEE Design Automation Conference

Pages 16 - 22

Published: 01 June 1985 Publication History

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Abstract

This paper investigates technical issues concerning the automated generation of highly regular VLSI circuit layouts (e.g. RAMs, PLAs, systolic arrays) that are crucial to the designability and realizability of large VLSI systems. The key is to determine the most profitable level of abstraction for the designer, which is accomplished by the introduction of macro abstraction, interface inheritance, delayed binding, and the complete decoupling of procedural and graphical design information. These abstraction mechanisms are implemented in the Regular Structure Generator, an operational layout generator with significant advantages over first generation layout tools. Its advantages are demonstrated by a pipelined array multiplier layout example.

References

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B. Liskov, et. al., CLU Reference Manual, Springer- Verlag, New York, 198i.

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C. Mead and L. Conway, Introduction to VLSI System~, Addison-Wesley, Menlo Park, California, 1980.

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R. Armstrong, HPEDIT Reference Manual, Research Laboratory of Electronics, 1982.

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K. Hwang, Computer Arithmetic, John Wiley and Sons, New York, 1979.

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C.E. Leisersort, F.M. Rose, J.B. Saxe, "Optimizing Synchronous Circuitry by Retiming," Third Caltech Conference on VLSI, Pasadena, California, March 1983.

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Cited By

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Yao SCheng CDutt DNahar SLo CDunlop A(1993)Cell-based hierarchical pitchmatching compaction using minimal LPProceedings of the 30th international Design Automation Conference10.1145/157485.164947(395-400)Online publication date: 1-Jul-1993
https://dl.acm.org/doi/10.1145/157485.164947
Lee JTang DTrevillyan LLightner M(1992)HIMALAYAS — a hierarchical compaction system with a minimized constraint setProceedings of the 1992 IEEE/ACM international conference on Computer-aided design10.5555/304032.304076(150-157)Online publication date: 8-Nov-1992
https://dl.acm.org/doi/10.5555/304032.304076
Bamji CVaradarajan RSchweikert D(1992)Hierarchical pitchmatching compaction using minimum designProceedings of the 29th ACM/IEEE Design Automation Conference10.5555/113938.149468(311-317)Online publication date: 1-Jul-1992
https://dl.acm.org/doi/10.5555/113938.149468
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Index Terms

A design by example regular structure generator
1. Applied computing
  1. Physical sciences and engineering
    1. Engineering
2. Hardware
  1. Very large scale integration design

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Information & Contributors

Information

Published In

DAC '85: Proceedings of the 22nd ACM/IEEE Design Automation Conference

June 1985

838 pages

ISBN:0818606355

Chairmen:
Hillel Ofek
Silvar-Lisco, Menlo Park, CA
,
Lawrence A. O'Neill
AT&T Bell Labs, Holmdel, NJ

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IEEE Press

Publication History

Published: 01 June 1985

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

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Yao SCheng CDutt DNahar SLo CDunlop A(1993)Cell-based hierarchical pitchmatching compaction using minimal LPProceedings of the 30th international Design Automation Conference10.1145/157485.164947(395-400)Online publication date: 1-Jul-1993
https://dl.acm.org/doi/10.1145/157485.164947
Lee JTang DTrevillyan LLightner M(1992)HIMALAYAS — a hierarchical compaction system with a minimized constraint setProceedings of the 1992 IEEE/ACM international conference on Computer-aided design10.5555/304032.304076(150-157)Online publication date: 8-Nov-1992
https://dl.acm.org/doi/10.5555/304032.304076
Bamji CVaradarajan RSchweikert D(1992)Hierarchical pitchmatching compaction using minimum designProceedings of the 29th ACM/IEEE Design Automation Conference10.5555/113938.149468(311-317)Online publication date: 1-Jul-1992
https://dl.acm.org/doi/10.5555/113938.149468
Bamji CAllen JThomas D(1989)GRASP: a grammar-based schematic parserProceedings of the 26th ACM/IEEE Design Automation Conference10.1145/74382.74457(448-453)Online publication date: 1-Jun-1989
https://dl.acm.org/doi/10.1145/74382.74457
Baer JLiem MMcMurchie LNottrott RSnyder LWinder WShaklee DNewton A(1988)A notation for describing multiple views of VLSI circuitsProceedings of the 25th ACM/IEEE Design Automation Conference10.5555/285730.285746(102-107)Online publication date: 1-Jun-1988
https://dl.acm.org/doi/10.5555/285730.285746

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