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A Characterization of Processor Performance in the vax-11/780

Published: 01 January 1984 Publication History

Abstract

This paper reports the results of a study of VAX-11/780 processor performance using a novel hardware monitoring technique. A micro-PC histogram monitor was built for these measurements. It keeps a count of the number of microcode cycles executed at each microcode location. Measurement experiments were performed on live timesharing workloads as well as on synthetic workloads of several types. The histogram counts allow the calculation of the frequency of various architectural events, such as the frequency of different types of opcodes and operand specifiers, as well as the frequency of some implementation-specific events, such as translation buffer misses. The measurement technique also yields the amount of processing time spent in various activities, such as ordinary microcode computation, memory management, and processor stalls of different kinds. This, paper reports in detail the amount of time the “average” VAX instruction spends in these activities.

References

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Clark, D.W. Cache Performance in the VAX-11/780. ACM TOCS 1, 1 (Feb. 1983), pp. 24-37.
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Clark, D.W. and Emer, J.S. Performance of the VAX-11/780 Translation Buffer: Simulation and Measurement. Submitted for publication, Nov. 1983.
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Published In

cover image ACM Conferences
ISCA '84: Proceedings of the 11th annual international symposium on Computer architecture
January 1984
373 pages
ISBN:0818605383
DOI:10.1145/800015
  • cover image ACM SIGARCH Computer Architecture News
    ACM SIGARCH Computer Architecture News  Volume 12, Issue 3
    June 1984
    348 pages
    ISSN:0163-5964
    DOI:10.1145/773453
    Issue’s Table of Contents

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Association for Computing Machinery

New York, NY, United States

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Published: 01 January 1984

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