IDDQ test method has previously been proposed employing a sinusoidal wave superposed on the DC supply voltage. The present paper proposes a strategy to improve the detectability of the test method by means of frequency analysis of the supply current. In this strategy, defects are detected by determining whether secondary harmonics of the sinusoidal wave exist in the supply current. The effectiveness of the method is confirmed by experiments on two CMOS NAND gate packages (SSIs)." />
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Detection of CMOS Open Node Defects by Frequency Analysis

Hiroyuki MICHINISHI
Tokumi YOKOHIRA
Takuji OKAMOTO
Toshifumi KOBAYASHI
Tsutomu HONDO

Publication
IEICE TRANSACTIONS on Information and Systems   Vol.E90-D    No.3    pp.685-687
Publication Date: 2007/03/01
Online ISSN: 1745-1361
DOI: 10.1093/ietisy/e90-d.3.685
Print ISSN: 0916-8532
Type of Manuscript: LETTER
Category: Dependable Computing
Keyword: 
current test,  open node defect,  floating gate defect,  frequency analysis,  

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Summary: 
A method to detect open node defects that cannot be detected by the conventional IDDQ test method has previously been proposed employing a sinusoidal wave superposed on the DC supply voltage. The present paper proposes a strategy to improve the detectability of the test method by means of frequency analysis of the supply current. In this strategy, defects are detected by determining whether secondary harmonics of the sinusoidal wave exist in the supply current. The effectiveness of the method is confirmed by experiments on two CMOS NAND gate packages (SSIs).

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