Abstract
Balanced asynchronous circuits have been touted as a superior replacement for conventional synchronous circuits. To assess these claims, we have designed, manufactured and tested an experimental asynchronous smart-card style device. In this paper we describe the tests performed and show that asynchronous circuits can provide better tamper-resistance. However, we have also discovered weaknesses with our test chip, some of which have resulted in new designs, and others which are more fundamental to the asynchronous design approach. This has led us to investigate the novel approach of design-time security analysis rather than rely on post manufacture analysis.
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Moore, S., Anderson, R., Cunningham, P., Mullins, R., Taylor, G.: Improving Smart Card Security using Self-timed Circuits. In: Proc. 8th IEEE International Symposium on Asynchronous Circuits and Systems – ASYNC 2002, pp. 23–58. IEEE, Los Alamitos (2002)
Plana, L.A., Riocreux, P.A., Bainbridge, W.J., Bardsley, A., Garside, J.D., Temple, S.: SPA - a synthesisable amulet core for smartcard applications. In: Proc. 8th IEEE International Symposium on Asynchronous Circuits and Systems – ASYNC 2002, pp. 201–210. IEEE, Los Alamitos (2002)
Mayer-Sommer, R.: Smartly Analyzing the Simplicity and the Power of Simple Power Analysis on Smartcards. In: Paar, C., Koç, Ç.K. (eds.) CHES 2000. LNCS, vol. 1965, p. 78. Springer, Heidelberg (2000)
Boneh, D., DeMillo, R.A., Lipton, R.J.: On the importance of checking cryptographic protocols for faults. In: Fumy, W. (ed.) EUROCRYPT 1997. LNCS, vol. 1233, pp. 274–285. Springer, Heidelberg (1997)
Biham, E., Shamir, A.: Differential fault analysis of secret key cryptosystems. In: Kaliski Jr., B.S. (ed.) CRYPTO 1997. LNCS, vol. 1294, pp. 513–525. Springer, Heidelberg (1997)
Kocher, P., Jaffe, J., Jun, B.: Differential power analysis. In: Wiener, M. (ed.) CRYPTO 1999. LNCS, vol. 1666, pp. 388–397. Springer, Heidelberg (1999)
Gandolfi, K., Mourtel, C., Olivier, F.: Electromagnetic analyis: Concrete results. In: Koç, Ç.K., Naccache, D., Paar, C. (eds.) CHES 2001. LNCS, vol. 2162, p. 251. Springer, Heidelberg (2001)
Quisquater, J.-J., Samyde, D.: ElectroMagnetic analysis EMA: Measures and coutermeasures for smart cards. In: Attali, S., Jensen, T. (eds.) E-smart 2001. LNCS, vol. 2140, pp. 200–210. Springer, Heidelberg (2001)
Anderson, R., Kuhn, M.: Tamper resistance – a cautionary note. In: Second USENIX Workshop on Electronic Commerce, USENIX, Oakland, California, November 1996, pp. 1–11 (1996)
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Fournier, J.J.A., Moore, S., Li, H., Mullins, R., Taylor, G. (2003). Security Evaluation of Asynchronous Circuits. In: Walter, C.D., Koç, Ç.K., Paar, C. (eds) Cryptographic Hardware and Embedded Systems - CHES 2003. CHES 2003. Lecture Notes in Computer Science, vol 2779. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-45238-6_12
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DOI: https://doi.org/10.1007/978-3-540-45238-6_12
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