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Reduce SW/HW Migration Efforts by a RTOS in Multi-FPGA Systems

  • Conference paper
Computer Supported Cooperative Work in Design II (CSCWD 2005)

Part of the book series: Lecture Notes in Computer Science ((LNISA,volume 3865))

Abstract

The boundary between software and hardware is becoming blurry in modern embedded systems, especially in reconfigurable computing systems. It makes an easy-to-use design space explorer more important than ever for engineers. This paper proposes a RTOS (Real-Time Operating System) to reduce design efforts while migrating functions between software and hardware. The RTOS provides reconfigurable hardware threads with identical API interfaces and data structures, just like those for software threads. To utilize reconfigurable resources efficiently, the states of threads are controlled and managed by the RTOS. Threads can also be preconfigured according to static DFGs (data flow graphs). Experiments on the Rhealstone benchmark have shown that multi-thread environments provided by the proposed RTOS can extend the scale of traditional operating systems and give designers more freedom to perform design space exploration.

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© 2006 Springer-Verlag Berlin Heidelberg

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Zhou, B., Chen, Y., Qiu, W., Chen, Y., Peng, C. (2006). Reduce SW/HW Migration Efforts by a RTOS in Multi-FPGA Systems. In: Shen, Wm., Chao, KM., Lin, Z., Barthès, JP.A., James, A. (eds) Computer Supported Cooperative Work in Design II. CSCWD 2005. Lecture Notes in Computer Science, vol 3865. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11686699_64

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  • DOI: https://doi.org/10.1007/11686699_64

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-32969-5

  • Online ISBN: 978-3-540-32970-1

  • eBook Packages: Computer ScienceComputer Science (R0)

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