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"Multi-FPGA Accelerator for Scalable Stencil Computation with Constant ..."

Kentaro Sano, Yoshiaki Hatsuda, Satoru Yamamoto (2014)

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DOI: 10.1109/TPDS.2013.51

access: closed

type: Journal Article

metadata version: 2020-10-02

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  dblp key:
  - journals/tpds/SanoHY14
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  persistent URL:
  - https://dblp.org/rec/journals/tpds/SanoHY14
Kentaro Sano, Yoshiaki Hatsuda, Satoru Yamamoto:
Multi-FPGA Accelerator for Scalable Stencil Computation with Constant Memory Bandwidth. IEEE Trans. Parallel Distributed Syst. 25(3): 695-705 (2014)

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