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"Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching ..."

Weisheng Zhao et al. (2014)

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DOI: 10.1109/TCSI.2013.2278332

access: closed

type: Journal Article

metadata version: 2022-10-02

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  - https://dblp.org/rec/journals/tcas/ZhaoMDZPKBADMQRRC14
Weisheng Zhao, Mathieu Moreau, Erya Deng, Yue Zhang, Jean-Michel Portal, Jacques-Olivier Klein, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Damien Querlioz, Nesrine Ben Romdhane, Dafine Ravelosona, Claude Chappert:
Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(2): 443-454 (2014)

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