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"Implementation of a Dual-Segment Architecture for a High-Pin-Count VLSI ..."

Michael G. Davis (1994)

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DOI: 10.1109/TEST.1994.527958

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Michael G. Davis:
Implementation of a Dual-Segment Architecture for a High-Pin-Count VLSI Test System. ITC 1994: 267-272

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