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"A Shared Memory Parallel Algorithm for Logic Synthesis."

Chieng-Fai Lim et al. (1993)

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DOI: 10.1109/ICVD.1993.669703

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/vlsid/LimBDM93
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  persistent URL:
  - https://dblp.org/rec/conf/vlsid/LimBDM93
Chieng-Fai Lim, Prithviraj Banerjee, Kaushik De, Saburo Muroga:
A Shared Memory Parallel Algorithm for Logic Synthesis. VLSI Design 1993: 317-322

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