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Tetsuya Yamada
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2020 – today
- 2023
- [j10]Yohei Hashimoto, Yugo Nakayama, Tatsuaki Furumoto, Akihito Sekiya, Tetsuya Yamada, Tatsuki Kawahara, Akira Hosokawa:
Finishing Speed Improvement Using Side Cover Plates in Gyro Finishing. Int. J. Autom. Technol. 17(1): 47-54 (2023) - 2021
- [j9]Toshitaka Nagai, Yukihiro Seki, Tetsuya Yamada:
Boundedness of solutions to a parabolic attraction-repulsion chemotaxis system in R2: The attractive dominant case. Appl. Math. Lett. 121: 107354 (2021) - 2020
- [c14]Hirotaka Sugiura, Toshihisa Osaki, Hisatoshi Mimura, Tetsuya Yamada, Shoji Takeuchi:
Dielecrophoretic introduction of the membrane proteins into the BLM platforms for the electrophygiological analysis systems. IROS 2020: 2763-2766
2010 – 2019
- 2019
- [c13]Tetsuya Yamada, Koki Kamiya, Toshihisa Osaki, Shoji Takeuchi:
Artificial cell membrane system for odorant sensor: development of solution exchange driven by superabsorbent polymer for repeatable detection. ISOEN 2019: 1-3 - [c12]Hirotaka Sugiura, Tetsuya Yamada, Atsufumi Ozoe, Yuki Kodama, Yasuhiko Takahashi, Toshihisa Osaki, Shoji Takeuchi:
Quantitative signal analysis of a ligand-gated ion channel on a lipid bilayer using continuous-time wavelet transformation. MHS 2019: 1-3 - 2013
- [c11]Tetsuro Honmura, Yuki Kondo, Tetsuya Yamada, Masashi Takada, Takumi Nitoh, Tohru Nojiri, Keisuke Toyama, Yasuhiko Saitoh, Hirofumi Nishi, Mikiko Sato, Mitaro Namiki:
Hardware support for resource partitioning in real-time embedded systems. COOL Chips 2013: 1-3 - 2012
- [c10]Tetsuya Yamada, Tadayuki Matsumura:
Battery-Aware IT Control Method for Effective Battery Use During Power Outage. GreenCom 2012: 565-572 - [c9]Tadayuki Matsumura, Tetsuya Yamada:
IT-Cooling Collaborative Control Methods for Battery-Aware IT-Systems Targeting India. ICT-GLOW 2012: 1-17 - 2011
- [j8]Osamu Nishii, Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, Hideo Maejima:
A 45-nm 37.3 GOPS/W Heterogeneous Multi-Core SOC with 16/32 Bit Instruction-Set General-Purpose Core. IEICE Trans. Electron. 94-C(4): 663-669 (2011) - [j7]Takahide Mizuno, Kousuke Kawahara, Kazuhiko Yamada, Yukio Kamata, Tetsuya Yamada, Hitoshi Kuninaka:
Beacon Tracking System and Its Performance in Search Operation for Hayabusa Sample Return Capsule. IEICE Trans. Commun. 94-B(11): 2961-2968 (2011) - 2010
- [c8]Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, Shigezumi Matsui, Osamu Nishii, Atsushi Hasegawa, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Koichi Terada, Tohru Nojiri, Masashi Satoh, Hiroyuki Mizuno, Kunio Uchiyama, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, Hideo Maejima:
A 45nm 37.3GOPS/W heterogeneous multi-core SoC. ISSCC 2010: 100-101
2000 – 2009
- 2008
- [j6]Stephen Keysuk Kim, Tetsuya Yamada, Hyunchul Kim:
Search for Alternatives and Collaboration with Incumbents: Two-Sided Sourcing Behavior in Business Markets. Decis. Sci. 39(1): 85-114 (2008) - 2007
- [j5]Tetsuya Yamada, Naohiko Irie, Takanobu Tsunoda, Takahiro Irita, Kenji Kitagawa, Ryohei Yoshida, Keisuke Toyama, Motoaki Satoyama:
A Hardware Accelerator for JavaTM Platforms on a 130-nm Embedded Processor Core. IEICE Trans. Electron. 90-C(2): 523-530 (2007) - [j4]Yusuke Kanno, Hiroyuki Mizuno, Yoshihiko Yasu, Kenji Hirose, Yasuhisa Shimazaki, Tadashi Hoshi, Yujiro Miyairi, Toshifumi Ishii, Tetsuya Yamada, Takahiro Irita, Toshihiro Hattori, Kazumasa Yanagisawa, Naohiko Irie:
Hierarchical Power Distribution With Power Tree in Dozens of Power Domains for 90-nm Low-Power Multi-CPU SoCs. IEEE J. Solid State Circuits 42(1): 74-83 (2007) - [c7]Makoto Saen, Kenichi Osada, Satoshi Misaka, Tetsuya Yamada, Yoshitaka Tsujimoto, Yuki Kondo, Tatsuya Kamei, Yutaka Yoshida, Ei Nagahama, Yusuke Nitta, Takayasu Ito, Tadashi Kameyama, Naohiko Irie:
Embedded SoC Resource Manager to Control Temperature and Data Bandwidth. ISSCC 2007: 296-604 - 2006
- [j3]Tetsuya Yamada, Masahide Abe, Yusuke Nitta, Kenji Ogura, Manabu Kusaoke, Makoto Ishikawa, Motokazu Ozawa, Kiwamu Takada, Fumio Arakawa, Osamu Nishii, Toshihiro Hattori:
Reducing Consuming Clock Power Optimization of a 90 nm Embedded Processor Core. IEICE Trans. Electron. 89-C(3): 287-294 (2006) - [j2]Fumio Arakawa, Tetsuya Yamada, Takashi Okada, Makoto Ishikawa, Yuki Kondo, Motokazu Ozawa, Tomoyuki Kodama, Osamu Nishii, Toshihiro Hattori, Tatsuya Kamei, Junichi Nishimoto, Shinichi Yoshioka:
Development of processor cores for digital consumer appliances. Syst. Comput. Jpn. 37(3): 10-19 (2006) - [c6]Masafumi Onouchi, Tetsuya Yamada, Kimihiro Morikawa, Isamu Mochizuki, Hidetoshi Sekine:
A system-level power-estimation methodology based on IP-level modeling, power-level adjustment, and power accumulation. ASP-DAC 2006: 547-550 - [c5]Toshihiro Hattori, Takahiro Irita, Masayuki Ito, Eiji Yamamoto, Hisashi Kato, Go Sado, Tetsuhiro Yamada, Kunihiko Nishiyama, Hiroshi Yagi, Takao Koike, Yoshihiko Tsuchihashi, Motoki Higashida, Hiroyuki Asano, Izumi Hayashibara, Ken Tatezawa, Yasuhisa Shimazaki, Naozumi Morino, Yoshihiko Yasu, Tadashi Hoshi, Yujiro Miyairi, Kazumasa Yanagisawa, Kenji Hirose, Saneaki Tamaki, Shinichi Yoshioka, Toshifumi Ishii, Yusuke Kanno, Hiroyuki Mizuno, Tetsuya Yamada, Naohiko Irie, Reiko Tsuchihashi, Nobuto Arai, Tomohiro Akiyama, Koji Ohno:
Hierarchical power distribution and power management scheme for a single chip mobile processor. DAC 2006: 292-295 - [c4]Yusuke Kanno, Hiroyuki Mizuno, Yoshihiko Yasu, Kenji Hirose, Yasuhisa Shimazaki, Tadashi Hoshi, Yujiro Miyairi, Toshifumi Ishii, Tetsuya Yamada, Takahiro Irita, Toshihiro Hattori, Kazumasa Yanagisawa, Naohiko Irie:
Hierarchical Power Distribution with 20 Power Domains in 90-nm Low-Power Multi-CPU Processor. ISSCC 2006: 2200-2209 - 2005
- [c3]Tetsuya Yamada, Masahide Abe, Yusuke Nitta, Kenji Ogura, Manabu Kusaoke, Makoto Ishikawa, Motokazu Ozawa, Kiwamu Takada, Fumio Arakawa, Osamu Nishii, Toshihiro Hattori:
Low-Power Design of 90-nm SuperH Processor Core. ICCD 2005: 258-266 - 2002
- [c2]Yutaka Kawaguchi, Hitoshi Nakagawa, Shoji Tanaka, Tetsuya Yamada:
Application of phased-array antenna technology to the 21 GHz broadcasting satellite for rain-attenuation compensation. ICC 2002: 2962-2966
1990 – 1999
- 1996
- [j1]Tetsuya Yamada, Hiroto Yasuura:
On the Computational Power of Binary Decision Diagram with Redundant Variables. Formal Methods Syst. Des. 8(1): 65-89 (1996) - 1995
- [c1]Keiichi Tokuda, Takashi Masuko, Tetsuya Yamada, Takao Kobayashi, Satoshi Imai:
An algorithm for speech parameter generation from continuous mixture HMMs with dynamic features. EUROSPEECH 1995: 757-760
Coauthor Index
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