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Hasnain Lakdawala
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2010 – 2019
- 2019
- [c26]Alvin Leng Sun Loke, Da Yang, Tin Tin Wee, Jonathan L. Holland, Patrick Isakanian, Kern Rim, Sam Yang, Jacob S. Schneider, Giri Nallapati, Sreeker Dundigal, Hasnain Lakdawala, Behnam Amelifard, Chulkyu Lee, Betty McGovern, Paul S. Holdaway, Xiaohua Kong, Burton M. Leary:
Analog/Mixed-Signal Design Challenges in 7-nm CMOS and Beyond. CICC 2019: 1-8 - 2018
- [c25]Alvin Leng Sun Loke, Da Yang, Tin Tin Wee, Jonathan L. Holland, Patrick Isakanian, Kern Rim, Sam Yang, Jacob S. Schneider, Giri Nallapati, Sreeker Dundigal, Hasnain Lakdawala, Behnam Amelifard, Chulkyu Lee, Betty McGovern, Paul S. Holdaway, Xiaohua Kong, Burton M. Leary:
Analog/mixed-signal design challenges in 7-nm CMOS and beyond. CICC 2018: 1-8 - 2015
- [j12]Sandipan Kundu, Erkan Alpman, Julia Hsin-Lin Lu, Hasnain Lakdawala, Jeyanandh Paramesh, Byunghoo Jung, Sarit Zur, Eshel Gordon:
A 1.2 V 2.64 GS/s 8 bit 39 mW Skew-Tolerant Time-interleaved SAR ADC in 40 nm Digital LP CMOS for 60 GHz WLAN. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(8): 1929-1939 (2015) - 2014
- [c24]Sandipan Kundu, Julia Hsin-Lin Lu, Erkan Alpman, Hasnain Lakdawala, Jeyanandh Paramesh, Byunghoo Jung, Sarit Zur, Eshel Gordon:
A 1.2 V 2.64 GS/s 8bit 39 mW skew-tolerant time-interleaved SAR ADC in 40 nm digital LP CMOS for 60 GHz WLAN. CICC 2014: 1-4 - 2013
- [j11]Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Khoa Minh Nguyen, Hyung-Jin Lee, Ashoke Ravi, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst
, Stefano Pellerano, Tong Kim, Satish Venkatesan, Durgesh Srivastava, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Sunder Ramamurthy, Raj Yavatkar, Krishnamurthy Soumyanath:
A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver. IEEE J. Solid State Circuits 48(1): 91-103 (2013) - [j10]Jorge Carballido, Jorge Hermosillo, Arturo Veloz-Guerrero, David Arditti, Alberto Del Rio, Edgar Borrayo Sandoval, Manuel E. Guzman-Renteria, Hasnain Lakdawala, Marian Verhelst
A Programmable Calibration/BIST Engine for RF and Analog Blocks in SoCs Integrated in a 32 nm CMOS WiFi Transceiver. IEEE J. Solid State Circuits 48(7): 1669-1679 (2013) - [j9]Ken Suyama, Hasnain Lakdawala:
Introduction to the Special Issue on the IEEE 2012 Custom Integrated Circuits Conference. IEEE J. Solid State Circuits 48(8): 1769-1770 (2013) - [c23]Hasnain Lakdawala, Eric Naviasky:
Analog techniques II. CICC 2013: 1 - [c22]Eric Naviasky, Hasnain Lakdawala:
Oversampled ADC's. CICC 2013: 1 - 2012
- [j8]Subhanshu Gupta, Daibashish Gangopadhyay, Hasnain Lakdawala, Jacques Christophe Rudell, David J. Allstot:
A 0.8-2 GHz Fully-Integrated QPLL-Timed Direct-RF-Sampling Bandpass ΣΔ ADC in 0.13 µm CMOS. IEEE J. Solid State Circuits 47(5): 1141-1153 (2012) - [j7]Wei Tai, Hongtao Xu, Ashoke Ravi, Hasnain Lakdawala, Ofir B. Degani, L. Richard Carley, Yorgos Palaskas:
A Transformer-Combined 31.5 dBm Outphasing Power Amplifier in 45 nm LP CMOS With Dynamic Power Control for Back-Off Power Efficiency Enhancement. IEEE J. Solid State Circuits 47(7): 1646-1658 (2012) - [j6]Hasnain Lakdawala, Alvin Leng Sun Loke:
Introduction to the Special Issue on the IEEE 2011 Custom Integrated Circuits Conference. IEEE J. Solid State Circuits 47(8): 1798-1799 (2012) - [j5]Ashoke Ravi, Paolo Madoglio, Hongtao Xu, Kailash Chandrashekar, Marian Verhelst
A 2.4-GHz 20-40-MHz Channel WLAN Digital Outphasing Transmitter Utilizing a Delay-Based Wideband Phase Modulator in 32-nm CMOS. IEEE J. Solid State Circuits 47(12): 3184-3196 (2012) - [c21]Jorge Hermosillo, Jorge Carballido, Arturo Veloz-Guerrero, David Arditti, Alberto Del Rio, Edgar Borrayo Sandoval, Manuel E. Guzman-Renteria, Hasnain Lakdawala, Marian Verhelst
A programmable calibration/BIST engine for RF/analog blocks in SoCs. ESSCIRC 2012: 133-136 - [c20]Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst
32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver. ISSCC 2012: 62-64 - [c19]Y. William Li, Carlos Ornelas, Hyung Seok Kim, Hasnain Lakdawala, Ashoke Ravi, Krishnamurthy Soumyanath:
A reconfigurable distributed all-digital clock generator core with SSC and skew correction in 22nm high-k tri-gate LP CMOS. ISSCC 2012: 70-72 - [c18]Paolo Madoglio, Ashoke Ravi, Hongtao Xu, Kailash Chandrashekar, Marian Verhelst
A 20dBm 2.4GHz digital outphasing transmitter for WLAN application in 32nm CMOS. ISSCC 2012: 168-170 - [c17]Yulin Tan, Jon Duster, Chang-Tsung Fu, Erkan Alpman, Ajay Balankutty, Chun C. Lee, Ashoke Ravi, Stefano Pellerano, Kailash Chandrashekar, Hyung Seok Kim, Brent R. Carlton, Satoshi Suzuki, M. Shafi, Yorgos Palaskas, Hasnain Lakdawala:
A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS. VLSIC 2012: 76-77 - 2011
- [c16]Y. William Li, Hasnain Lakdawala:
Smart integrated temperature sensor - mixed-signal circuits and systems in 32-nm and beyond. CICC 2011: 1-8 - [c15]Wei Tai, Hongtao Xu, Ashoke Ravi, Hasnain Lakdawala, Ofir B. Degani, L. Richard Carley, Yorgos Palaskas:
A 31.5dBm outphasing class-D power amplifier in 45nm CMOS with back-off efficiency enhancement by dynamic power control. ESSCIRC 2011: 131-134 - [c14]Chang-Tsung Fu, Hasnain Lakdawala, Stewart S. Taylor, Krishnamurthy Soumyanath:
A 2.5GHz 32nm 0.35mm2 3.5dB NF -5dBm P1dB fully differential CMOS push-pull LNA with integrated 34dBm T/R switch and ESD protection. ISSCC 2011: 56-58 - [c13]Yulin Tan, Hongtao Xu, Mohammed A. El-Tanani
A flip-chip-packaged 1.8V 28dBm class-AB power amplifier with shielded concentric transformers in 32nm SoC CMOS. ISSCC 2011: 426-428 - 2010
- [c12]Zhenning Wang, Richard Lin, Eshel Gordon, Hasnain Lakdawala, L. Richard Carley, Jonathan C. Jensen:
An in-situ temperature-sensing interface based on a SAR ADC in 45nm LP digital CMOS for the frequency-temperature compensation of crystal oscillators. ISSCC 2010: 316-317
2000 – 2009
- 2009
- [j4]Jeffrey S. Walling
A Class-E PA With Pulse-Width and Pulse-Position Modulation in 65 nm CMOS. IEEE J. Solid State Circuits 44(6): 1668-1678 (2009) - [j3]Hasnain Lakdawala, Y. William Li, Arijit Raychowdhury, Greg Taylor, Krishnamurthy Soumyanath:
A 1.05 V 1.6 mW, 0.45°C 3σ Resolution ΣΔ Based Temperature Sensor With Parasitic Resistance Compensation in 32 nm Digital CMOS Process. IEEE J. Solid State Circuits 44(12): 3621-3630 (2009) - [c11]Hasnain Lakdawala, Kenneth Szajda:
MEMS, biomedicals, and sensors. CICC 2009 - [c10]Tawfiq Musah
A 630μW zero-crossing-based ΔΣ ADC using switched-resistor current sources in 45nm CMOS. CICC 2009: 1-4 - [c9]Erkan Alpman, Hasnain Lakdawala, L. Richard Carley, Krishnamurthy Soumyanath:
A 1.1V 50mW 2.5GS/s 7b Time-Interleaved C-2C SAR ADC in 45nm LP digital CMOS. ISSCC 2009: 76-77 - [c8]Y. William Li, Hasnain Lakdawala, Arijit Raychowdhury, Greg Taylor, Krishnamurthy Soumyanath:
A 1.05V 1.6mW 0.45°C 3σ-resolution ΔΣ-based temperature sensor with parasitic-resistance compensation in 32nm CMOS. ISSCC 2009: 340-341 - 2008
- [c7]Hiroyuki Ito, Hasnain Lakdawala, Ashoke Ravi, Stefano Pellerano, Rick Ruby, Krishnamurthy Soumyanath, Kazuya Masu
A 1.7-GHz 1.5-mW digitally-controlled FBAR oscillator with 0.03-ppb resolution. ESSCIRC 2008: 98-101 - [c6]Parmoon Seddighrad, Ashoke Ravi, Masoud Sajadieh, Hasnain Lakdawala, Krishnamurthy Soumyanath:
A 3.6GHz, 16mW ΣΔ DAC for a 802.11n / 802.16e transmitter with 30dB digital power control in 90nm CMOS. ESSCIRC 2008: 202-205 - [c5]Pukar Malla, Hasnain Lakdawala, Kevin T. Kornegay
A 28mW Spectrum-Sensing Reconfigurable 20MHz 72dB-SNR 70dB-SNDR DT ΔΣ ADC for 802.11n/WiMAX Receivers. ISSCC 2008: 496-497 - [c4]Jeffrey S. Walling
A 28.6dBm 65nm Class-E PA with Envelope Restoration by Pulse-Width and Pulse-Position Modulation. ISSCC 2008: 566-567 - 2006
- [j2]Yorgos Palaskas, Stewart S. Taylor, Stefano Pellerano, Ian A. Rippke, Ralph E. Bishop, Ashoke Ravi, Hasnain Lakdawala, Krishnamurthy Soumyanath:
A 5-GHz 20-dBm Power Amplifier With Digitally Assisted AM-PM Correction in a 90-nm CMOS Process. IEEE J. Solid State Circuits 41(8): 1757-1763 (2006) - 2005
- [c3]Sitaraman V. Iyer, Hasnain Lakdawala, Rajarishi S. Sinha, Eric J. Zacherl, Richard T. Unetich, Daniel M. Gaugel, David F. Guillou, L. Richard Carley:
A 0.5 mm2 integrated capacitive vibration sensor with sub-10 zF/rt-Hz noise floor. CICC 2005: 93-96 - [c2]Yorgos Palaskas, Stewart S. Taylor, Stefano Pellerano, Ian A. Rippke, Ralph E. Bishop, Ashoke Ravi, Hasnain Lakdawala, Krishnamurthy Soumyanath:
A 5 GHz class-AB power amplifier in 90 nm CMOS with digitally-assisted AM-PM correction. CICC 2005: 813-816 - 2002
- [j1]Hasnain Lakdawala, Xu Zhu, Hao Luo, Suresh Santhanam, L. Richard Carley, Gary K. Fedder
Micromachined high-Q inductors in a 0.18-μm copper interconnect low-k dielectric CMOS process. IEEE J. Solid State Circuits 37(3): 394-403 (2002) - 2001
- [c1]Hasnain Lakdawala, Xu Zhu, Hao Luo, Suresh Santhanam, L. Rick Carley, Gary K. Fedder:
Micromachined high-Q inductors in 0.18 μm Cu interconnect low-K CMOS. CICC 2001: 579-582
Coauthor Index
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