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James Laudon
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2020 – today
- 2024
- [i13]Peter Schafhalter, Shun Liao, Yanqi Zhou, Chih-Kuan Yeh, Arun Kandoor, James Laudon:
Scalable Multi-Domain Adaptation of Language Models using Modular Experts. CoRR abs/2410.10181 (2024) - 2023
- [c27]Wuyang Chen, Yanqi Zhou, Nan Du, Yanping Huang, James Laudon, Zhifeng Chen, Claire Cui:
Lifelong Language Pretraining with Distribution-Specialized Experts. ICML 2023: 5383-5395 - [c26]Yanqi Zhou, Nan Du, Yanping Huang, Daiyi Peng, Chang Lan, Da Huang, Siamak Shakeri, David R. So, Andrew M. Dai, Yifeng Lu, Zhifeng Chen, Quoc V. Le, Claire Cui, James Laudon, Jeff Dean:
Brainformers: Trading Simplicity for Efficiency. ICML 2023: 42531-42542 - [c25]Yi Hu, Chaoran Zhang, Edward Andert, Harshul Singh, Aviral Shrivastava, James Laudon, Yanqi Zhou, Bob Iannucci, Carlee Joe-Wong:
GiPH: Generalizable Placement Learning for Adaptive Heterogeneous Computing. MLSys 2023 - [i12]Wuyang Chen, Yanqi Zhou, Nan Du, Yanping Huang, James Laudon, Zhifeng Chen, Claire Cui:
Lifelong Language Pretraining with Distribution-Specialized Experts. CoRR abs/2305.12281 (2023) - [i11]Yi Hu, Chaoran Zhang, Edward Andert, Harshul Singh, Aviral Shrivastava, James Laudon, Yanqi Zhou, Bob Iannucci, Carlee Joe-Wong:
GiPH: Generalizable Placement Learning for Adaptive Heterogeneous Computing. CoRR abs/2305.14562 (2023) - [i10]Yanqi Zhou, Nan Du, Yanping Huang, Daiyi Peng, Chang Lan, Da Huang, Siamak Shakeri, David R. So, Andrew M. Dai, Yifeng Lu, Zhifeng Chen, Quoc V. Le, Claire Cui, James Laudon, Jeff Dean:
Brainformers: Trading Simplicity for Efficiency. CoRR abs/2306.00008 (2023) - 2022
- [c24]Kiran Seshadri, Berkin Akin, James Laudon, Ravi Narayanaswami, Amir Yazdanbakhsh:
An Evaluation of Edge TPU Accelerators for Convolutional Neural Networks. IISWC 2022: 79-91 - [c23]Xinfeng Xie, Prakash Prabhu, Ulysse Beaugnon, Phitchaya Mangpo Phothilimthana, Sudip Roy, Azalia Mirhoseini, Eugene Brevdo, James Laudon, Yanqi Zhou:
A Transferable Approach for Partitioning Machine Learning Models on Multi-Chip-Modules. MLSys 2022 - [c22]Yanqi Zhou, Xuanyi Dong, Tianjian Meng, Mingxing Tan, Berkin Akin, Daiyi Peng, Amir Yazdanbakhsh, Da Huang, Ravi Narayanaswami, James Laudon:
Towards the Co-design of Neural Networks and Accelerators. MLSys 2022 - [c21]Yanqi Zhou, Tao Lei, Hanxiao Liu, Nan Du, Yanping Huang, Vincent Y. Zhao, Andrew M. Dai, Zhifeng Chen, Quoc V. Le, James Laudon:
Mixture-of-Experts with Expert Choice Routing. NeurIPS 2022 - [i9]Yanqi Zhou, Tao Lei, Hanxiao Liu, Nan Du, Yanping Huang, Vincent Y. Zhao, Andrew M. Dai, Zhifeng Chen, Quoc Le, James Laudon:
Mixture-of-Experts with Expert Choice Routing. CoRR abs/2202.09368 (2022) - 2021
- [j10]Thomas Norrie, Nishant Patil, Doe Hyun Yoon, George Kurian, Sheng Li, James Laudon, Cliff Young, Norman P. Jouppi, David A. Patterson:
The Design Process for Google's Training Chips: TPUv2 and TPUv3. IEEE Micro 41(2): 56-63 (2021) - [j9]Azalia Mirhoseini, Anna Goldie, Mustafa Yazgan, Joe Wenjie Jiang, Ebrahim M. Songhori, Shen Wang, Young-Joon Lee, Eric Johnson, Omkar Pathak, Azade Nazi, Jiwoo Pak, Andy Tong, Kavya Srinivasa, William Hang, Emre Tuncer, Quoc V. Le, James Laudon, Richard Ho, Roger Carpenter, Jeff Dean:
A graph placement methodology for fast chip design. Nat. 594(7862): 207-212 (2021) - [c20]Norman P. Jouppi, Doe Hyun Yoon, Matthew Ashcraft, Mark Gottscho, Thomas B. Jablin, George Kurian, James Laudon, Sheng Li, Peter C. Ma, Xiaoyu Ma, Thomas Norrie, Nishant Patil, Sushma Prasad, Cliff Young, Zongwei Zhou, David A. Patterson:
Ten Lessons From Three Generations Shaped Google's TPUv4i : Industrial Product. ISCA 2021: 1-14 - [i8]Amir Yazdanbakhsh, Christof Angermüller, Berkin Akin, Yanqi Zhou, Albin Jones, Milad Hashemi, Kevin Swersky, Satrajit Chatterjee, Ravi Narayanaswami, James Laudon:
Apollo: Transferable Architecture Exploration. CoRR abs/2102.01723 (2021) - [i7]Yanqi Zhou, Xuanyi Dong, Berkin Akin, Mingxing Tan, Daiyi Peng, Tianjian Meng, Amir Yazdanbakhsh, Da Huang, Ravi Narayanaswami, James Laudon:
Rethinking Co-design of Neural Architectures and Hardware Accelerators. CoRR abs/2102.08619 (2021) - [i6]Amir Yazdanbakhsh, Kiran Seshadri, Berkin Akin, James Laudon, Ravi Narayanaswami:
An Evaluation of Edge TPU Accelerators for Convolutional Neural Networks. CoRR abs/2102.10423 (2021) - [i5]Xinfeng Xie, Prakash Prabhu, Ulysse Beaugnon, Phitchaya Mangpo Phothilimthana, Sudip Roy, Azalia Mirhoseini, Eugene Brevdo, James Laudon, Yanqi Zhou:
A Transferable Approach for Partitioning Machine Learning Models on Multi-Chip-Modules. CoRR abs/2112.04041 (2021) - 2020
- [j8]Norman P. Jouppi, Doe Hyun Yoon, George Kurian, Sheng Li, Nishant Patil, James Laudon, Cliff Young, David A. Patterson:
A domain-specific supercomputer for training deep neural networks. Commun. ACM 63(7): 67-78 (2020) - [j7]Yanqi Zhou, Sudip Roy, AmirAli Abdolrashidi, Daniel Lin-Kit Wong, Peter C. Ma, Qiumin Xu, Azalia Mirhoseini, James Laudon:
A Single-Shot Generalized Device Placement for Large Dataflow Graphs. IEEE Micro 40(5): 26-36 (2020) - [c19]Thomas Norrie, Nishant Patil, Doe Hyun Yoon, George Kurian, Sheng Li, James Laudon, Cliff Young, Norman P. Jouppi, David A. Patterson:
Google's Training Chips Revealed: TPUv2 and TPUv3. Hot Chips Symposium 2020: 1-70 - [c18]Yanqi Zhou, Sudip Roy, AmirAli Abdolrashidi, Daniel Wong, Peter C. Ma, Qiumin Xu, Hanxiao Liu, Mangpo Phitchaya Phothilimtha, Shen Wang, Anna Goldie, Azalia Mirhoseini, James Laudon:
Transferable Graph Optimizers for ML Compilers. NeurIPS 2020 - [i4]Azalia Mirhoseini, Anna Goldie, Mustafa Yazgan, Joe W. J. Jiang, Ebrahim M. Songhori, Shen Wang, Young-Joon Lee, Eric Johnson, Omkar Pathak, Sungmin Bae, Azade Nazi, Jiwoo Pak, Andy Tong, Kavya Srinivasa, William Hang, Emre Tuncer, Anand Babu, Quoc V. Le, James Laudon, Richard Ho, Roger Carpenter, Jeff Dean:
Chip Placement with Deep Reinforcement Learning. CoRR abs/2004.10746 (2020) - [i3]Yanqi Zhou, Sudip Roy, AmirAli Abdolrashidi, Daniel Wong, Peter C. Ma, Qiumin Xu, Hanxiao Liu, Mangpo Phitchaya Phothilimtha, Shen Wang, Anna Goldie, Azalia Mirhoseini, James Laudon:
Transferable Graph Optimizers for ML Compilers. CoRR abs/2010.12438 (2020)
2010 – 2019
- 2019
- [i2]Yanqi Zhou, Sudip Roy, AmirAli Abdolrashidi, Daniel Lin-Kit Wong, Peter C. Ma, Qiumin Xu, Ming Zhong, Hanxiao Liu, Anna Goldie, Azalia Mirhoseini, James Laudon:
GDP: Generalized Device Placement for Dataflow Graphs. CoRR abs/1910.01578 (2019) - 2017
- [c17]Norman P. Jouppi, Cliff Young, Nishant Patil, David A. Patterson, Gaurav Agrawal, Raminder Bajwa, Sarah Bates, Suresh Bhatia, Nan Boden, Al Borchers, Rick Boyle, Pierre-luc Cantin, Clifford Chao, Chris Clark, Jeremy Coriell, Mike Daley, Matt Dau, Jeffrey Dean, Ben Gelb, Tara Vazir Ghaemmaghami, Rajendra Gottipati, William Gulland, Robert Hagmann, C. Richard Ho, Doug Hogberg, John Hu, Robert Hundt, Dan Hurt, Julian Ibarz, Aaron Jaffey, Alek Jaworski, Alexander Kaplan, Harshit Khaitan, Daniel Killebrew, Andy Koch, Naveen Kumar, Steve Lacy, James Laudon, James Law, Diemthu Le, Chris Leary, Zhuyuan Liu, Kyle Lucke, Alan Lundin, Gordon MacKean, Adriana Maggiore, Maire Mahony, Kieran Miller, Rahul Nagarajan, Ravi Narayanaswami, Ray Ni, Kathy Nix, Thomas Norrie, Mark Omernick, Narayana Penukonda, Andy Phelps, Jonathan Ross, Matt Ross, Amir Salek, Emad Samadiani, Chris Severn, Gregory Sizikov, Matthew Snelham, Jed Souter, Dan Steinberg, Andy Swing, Mercedes Tan, Gregory Thorson, Bo Tian, Horia Toma, Erick Tuttle, Vijay Vasudevan, Richard Walter, Walter Wang, Eric Wilcox, Doe Hyun Yoon:
In-Datacenter Performance Analysis of a Tensor Processing Unit. ISCA 2017: 1-12 - [i1]Norman P. Jouppi, Cliff Young, Nishant Patil, David A. Patterson, Gaurav Agrawal, Raminder Bajwa, Sarah Bates, Suresh Bhatia, Nan Boden, Al Borchers, Rick Boyle, Pierre-luc Cantin, Clifford Chao, Chris Clark, Jeremy Coriell, Mike Daley, Matt Dau, Jeffrey Dean, Ben Gelb, Tara Vazir Ghaemmaghami, Rajendra Gottipati, William Gulland, Robert Hagmann, C. Richard Ho, Doug Hogberg, John Hu, Robert Hundt, Dan Hurt, Julian Ibarz, Aaron Jaffey, Alek Jaworski, Alexander Kaplan, Harshit Khaitan, Andy Koch, Naveen Kumar, Steve Lacy, James Laudon, James Law, Diemthu Le, Chris Leary, Zhuyuan Liu, Kyle Lucke, Alan Lundin, Gordon MacKean, Adriana Maggiore, Maire Mahony, Kieran Miller, Rahul Nagarajan, Ravi Narayanaswami, Ray Ni, Kathy Nix, Thomas Norrie, Mark Omernick, Narayana Penukonda, Andy Phelps, Jonathan Ross, Amir Salek, Emad Samadiani, Chris Severn, Gregory Sizikov, Matthew Snelham, Jed Souter, Dan Steinberg, Andy Swing, Mercedes Tan, Gregory Thorson, Bo Tian, Horia Toma, Erick Tuttle, Vijay Vasudevan, Richard Walter, Walter Wang, Eric Wilcox, Doe Hyun Yoon:
In-Datacenter Performance Analysis of a Tensor Processing Unit. CoRR abs/1704.04760 (2017)
2000 – 2009
- 2009
- [p2]James Laudon, Robert T. Golla, Greg Grohoski:
Throughput-Oriented Multicore Processors. Multicore Processors and Systems 2009: 205-230 - 2007
- [b1]Kunle Olukotun, Lance Hammond, James Laudon:
iChip Multiprocessor Architecture: Techniques to Improve Throughput and Latency. Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers 2007, ISBN 978-3-031-00592-3 - [j6]James Laudon, Lawrence Spracklen:
The Coming Wave of Multithreaded Chip Multiprocessors. Int. J. Parallel Program. 35(3): 299-330 (2007) - [c16]Kyle J. Nesbit, James Laudon, James E. Smith:
Virtual private caches. ISCA 2007: 57-68 - 2006
- [j5]Richard McDougall, James Laudon:
Multi-Core Microprocessors Are Here. login Usenix Mag. 31(5) (2006) - [c15]Kyle J. Nesbit, Nidhi Aggarwal, James Laudon, James E. Smith:
Fair Queuing Memory Systems. MICRO 2006: 208-222 - 2005
- [j4]James Laudon:
Performance/Watt: the new server focus. SIGARCH Comput. Archit. News 33(4): 5-13 (2005) - [j3]John D. Davis, Cong Fu, James Laudon:
The RASE (Rapid, Accurate Simulation Environment) for chip multiprocessors. SIGARCH Comput. Archit. News 33(4): 14-23 (2005) - [c14]John D. Davis, James Laudon, Kunle Olukotun:
Maximizing CMP Throughput with Mediocre Cores. IEEE PACT 2005: 51-62
1990 – 1999
- 1998
- [c13]Daniel Lenoski, James Laudon:
Retrospective: The DASH Prototype: Implementation and Performance. 25 Years ISCA: Retrospectives and Reprints 1998: 80-82 - [c12]Kourosh Gharachorloo, Daniel Lenoski, James Laudon, Phillip B. Gibbons, Anoop Gupta, John L. Hennessy:
Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors. 25 Years ISCA: Retrospectives and Reprints 1998: 376-387 - [c11]Daniel Lenoski, James Laudon, Truman Joe, David Nakahira, Luis Stevens, Anoop Gupta, John L. Hennessy:
The DASH Prototype: Implementation and Performance. 25 Years ISCA: Retrospectives and Reprints 1998: 418-429 - 1997
- [c10]James Laudon, Daniel Lenoski:
System overview of the SGI Origin 200/2000 product line. COMPCON 1997: 150-156 - [c9]James Laudon, Daniel Lenoski:
The SGI Origin: A ccNUMA Highly Scalable Server. ISCA 1997: 241-251 - 1994
- [c8]James Laudon, Anoop Gupta, Mark Horowitz:
Interleaving: A Multithreading Technique Targeting Multiprocessors and Workstations. ASPLOS 1994: 308-318 - [p1]James Laudon, Anoop Gupta, Mark Horowitz:
Architectural and Implementation Tradeoffs in the Design of Multiple-Context Processors. Multithreaded Computer Architecture 1994: 167-200 - 1993
- [j2]Daniel Lenoski, James Laudon, Truman Joe, David Nakahira, Luis Stevens, Anoop Gupta, John L. Hennessy:
The DASH Prototype: Logic Overhead and Performance. IEEE Trans. Parallel Distributed Syst. 4(1): 41-61 (1993) - 1992
- [j1]Daniel Lenoski, James Laudon, Kourosh Gharachorloo, Wolf-Dietrich Weber, Anoop Gupta, John L. Hennessy, Mark Horowitz, Monica S. Lam:
The Stanford Dash Multiprocessor. Computer 25(3): 63-79 (1992) - [c7]Daniel Lenoski, James Laudon, Truman Joe, David Nakahira, Luis Stevens, Anoop Gupta, John L. Hennessy:
The DASH Prototype: Implementation and Performance. ISCA 1992: 92-103 - [c6]James Laudon, Anoop Gupta, Mark Horowitz:
Architectural and implementation tradeoffs in the design of multiple-context processors. ISCA 1992: 435 - 1990
- [c5]Daniel Lenoski, Kourosh Gharachorloo, James Laudon, Anoop Gupta, John L. Hennessy, Mark Horowitz, Monica Lam:
Design of scalable shared-memory multiprocessors: the DASH approach. Compcon 1990: 62-67 - [c4]Kourosh Gharachorloo, Daniel Lenoski, James Laudon, Phillip B. Gibbons, Anoop Gupta, John L. Hennessy:
Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors. ISCA 1990: 15-26 - [c3]Daniel Lenoski, James Laudon, Kourosh Gharachorloo, Anoop Gupta, John L. Hennessy:
The Directory-Based Cache Coherence Protocol for the DASH Multiprocessor. ISCA 1990: 148-159
1980 – 1989
- 1988
- [c2]James E. Smith, Gregory E. Dermer, B. D. Vanderwarn, S. D. Klinger, C. M. Rozewski, D. L. Fowler, K. R. Scidmore, James Laudon:
The Astronautics ZS-1 processor. ICCD 1988: 307-310 - 1987
- [c1]James E. Smith, Gregory E. Dermer, B. D. Vanderwarn, S. D. Klinger, C. M. Rozewski, D. L. Fowler, K. R. Scidmore, James Laudon:
The ZS-1 Central Processor. ASPLOS 1987: 199-204
Coauthor Index
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last updated on 2024-11-26 21:45 CET by the dblp team
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