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Haikun Zhu
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2020 – today
- 2023
- [j3]Fabio Braggion
, Alberto Manconi
Household Credit and Regulatory Arbitrage: Evidence from Online Marketplace Lending. Manag. Sci. 69(10): 6271-6292 (2023)
2000 – 2009
- 2008
- [j2]Masanori Hashimoto
Analytical Eye-Diagram Model for On-Chip Distortionless Transmission Lines and Its Application to Design Space Exploration. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(12): 3474-3480 (2008) - [c11]Yi Zhu, Jianhua Liu, Haikun Zhu, Chung-Kuan Cheng:
Timing-power optimization for mixed-radix Ling adders by integer linear programming. ASP-DAC 2008: 131-137 - [c10]Ling Zhang, Jianhua Liu, Haikun Zhu, Chung-Kuan Cheng, Masanori Hashimoto
High performance current-mode differential logic. ASP-DAC 2008: 720-725 - [c9]Ling Zhang, Wenjian Yu, Haikun Zhu, Alina Deutsch, George A. Katopis, Daniel M. Dreps, Ernest S. Kuh, Chung-Kuan Cheng:
Low power passive equalizer optimization using tritonic step response. DAC 2008: 570-573 - [c8]Ling Zhang, Wenjian Yu, Haikun Zhu, Wanping Zhang, Chung-Kuan Cheng:
Clock Skew Analysis via Vector Fitting in Frequency Domain. ISQED 2008: 476-479 - 2007
- [c7]Jianhua Liu, Yi Zhu, Haikun Zhu, Chung-Kuan Cheng, John Lillis:
Optimum Prefix Adders in a Comprehensive Area, Timing and Power Design Space. ASP-DAC 2007: 609-615 - [c6]Haikun Zhu, Yi Zhu, Chung-Kuan Cheng, David M. Harris:
An Interconnect-Centric Approach to Cyclic Shifter Design Using Fanout Splitting and Cell Order Optimization. ASP-DAC 2007: 616-621 - [c5]Haikun Zhu, Rui Shi, Chung-Kuan Cheng, Hongyu Chen:
Approaching Speed-of-light Distortionless Communication for On-chip Interconnect. ASP-DAC 2007: 684-689 - [c4]Masanori Hashimoto
Analytical Eye-diagram Model for On-chip Distortionless Transmission Lines and Its Application to Design Space Exploration. CICC 2007: 869-872 - [c3]Chun-Chen Liu, Haikun Zhu, Chung-Kuan Cheng:
Passive compensation for high performance inter-chip communication. ICCD 2007: 547-552 - 2006
- [j1]Haikun Zhu, Chung-Kuan Cheng, Ronald L. Graham:
On the construction of zero-deficiency parallel prefix circuits with minimum depth. ACM Trans. Design Autom. Electr. Syst. 11(2): 387-409 (2006) - 2005
- [c2]Haikun Zhu, Chung-Kuan Cheng, Ronald L. Graham:
Constructing zero-deficiency parallel prefix adder of minimum depth. ASP-DAC 2005: 883-888 - 2003
- [c1]Jianhua Liu, Shuo Zhou, Haikun Zhu, Chung-Kuan Cheng:
An Algorithmic Approach for Generic Parallel Adders. ICCAD 2003: 734-740
Coauthor Index
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