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Wenlong Jiang
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2020 – today
- 2025
- [j5]Madison Lewis, Wenlong Jiang, Nicholas D. Theis
, Joshua Cape
Classification of psychosis spectrum disorders using graph convolutional networks with structurally constrained functional connectomes. Neural Networks 181: 106771 (2025) - 2024
- [j4]Wenlong Jiang
YOLOv8-FDF: A Small Target Detection Algorithm in Complex Scenes. IEEE Access 12: 119223-119237 (2024) - [c7]Guoqing Zhang
Detection of False Data Injection Attacks in Smart Grid Based on Kernel Principal Component Analysis. PEAI 2024: 823-827 - [c6]Wenlong Jiang, Pei Yin, Wangwei Zhu:
Cryptocurrency Transaction Fraud Detection Based on Imbalanced Classification with Interpretable Analysis. WHICEB (2) 2024: 386-398 - [i1]Hamed Firooz, Maziar Sanjabi, Wenlong Jiang, Xiaoling Zhai:
Lost-in-Distance: Impact of Contextual Proximity on LLM Performance in Graph Tasks. CoRR abs/2410.01985 (2024)
2010 – 2019
- 2019
- [j3]Jiacheng Pan
Simultaneous Transmission of Up To 94-mW Self-Regulated Wireless Power and Up To 5-Mb/s Reverse Data Over a Single Pair of Coils. IEEE J. Solid State Circuits 54(4): 1003-1016 (2019) - [j2]Dejan Rozgic, Vahagn Hokhikyan, Wenlong Jiang, Ippei Akita
A 0.338 cm3, Artifact-Free, 64-Contact Neuromodulation Platform for Simultaneous Stimulation and Sensing. IEEE Trans. Biomed. Circuits Syst. 13(1): 38-55 (2019) - 2018
- [c5]Jiacheng Pan, Asad A. Abidi, Wenlong Jiang, Dejan Rozgic, Dejan Markovic:
Self-Regulated Wireless Power and Simultaneous 5MB/S Reverse Data over One Pair of Coils. VLSI Circuits 2018: 193-194 - 2017
- [j1]Wenlong Jiang
A ±50-mV Linear-Input-Range VCO-Based Neural-Recording Front-End With Digital Nonlinearity Correction. IEEE J. Solid State Circuits 52(1): 173-184 (2017) - [c4]Dejan Rozgic, Vahagn Hokhikyan, Wenlong Jiang, Sina Basir-Kazeruni, Hariprasad Chandrakumar, Weiyu Leng, Dejan Markovic:
A true full-duplex 32-channel 0.135cm3 neural interface. BioCAS 2017: 1-4 - 2016
- [c3]Wenlong Jiang, Vahagn Hokhikyan, Hariprasad Chandrakumar, Vaibhav Karkare, Dejan Markovic:
28.6 A ±50mV linear-input-range VCO-based neural-recording front-end with digital nonlinearity correction. ISSCC 2016: 484-485 - 2012
- [c2]Wenlong Jiang, Armin Tavakol, Popong Effendrik, Marcel van de Gevel, Frank Verwaal, Robert Bogdan Staszewski
Design of ADPLL system for WiMAX applications in 40-nm CMOS. ICECS 2012: 73-76 - 2011
- [c1]Popong Effendrik, Wenlong Jiang, Marcel van de Gevel, Frank Verwaal, Robert Bogdan Staszewski
Time-to-digital converter (TDC) for WiMAX ADPLL in 40-nm CMOS. ECCTD 2011: 365-368
Coauthor Index
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