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Andrew Bardsley
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2010 – 2019
- 2010
- [c8]Luis A. Tarazona, Doug A. Edwards, Andrew Bardsley, Luis A. Plana:
Description-Level Optimisation of Synthesisable Asynchronous Circuits. DSD 2010: 441-448
2000 – 2009
- 2009
- [c7]Andrew Bardsley, Luis A. Tarazona, Doug A. Edwards:
Teak: A Token-Flow Implementation for the Balsa Language. ACSD 2009: 23-31 - 2007
- [c6]Andrew M. Scott, Mark E. Schuelein, Marly Roncken, Jin-Jer Hwan, John Bainbridge, John R. Mawer, David L. Jackson, Andrew Bardsley:
Asynchronous on-Chip Communication: Explorations on the Intel PXA27x Processor Peripheral Bus. ASYNC 2007: 60-72 - [c5]Luis A. Plana, Doug A. Edwards, Sam Taylor, Luis A. Tarazona, Andrew Bardsley:
Performance-driven syntax-directed synthesis of asynchronous processors. CASES 2007: 43-47 - 2006
- [c4]William B. Toms, David A. Edwards, Andrew Bardsley:
Synthesising Heterogeneously Encoded Systems. ASYNC 2006: 138-149 - 2003
- [j3]Luis A. Plana, Peter A. Riocreux, W. J. Bainbridge, Andrew Bardsley, Steve Temple, Jim D. Garside, Z. C. Yu:
SPA - a secure Amulet core for smartcard applications. Microprocess. Microsystems 27(9): 431-446 (2003) - 2002
- [j2]Doug A. Edwards, Andrew Bardsley:
Balsa: An Asynchronous Hardware Synthesis Language. Comput. J. 45(1): 12-18 (2002) - [c3]W. J. Bainbridge, Andrew Bardsley, Steve Temple, Jim D. Garside, Peter A. Riocreux, Luis A. Plana:
SPA - A Synthesisable Amulet Core for Smartcard pplications. ASYNC 2002: 201-210 - [c2]Tiberiu Chelcea, Steven M. Nowick, Andrew Bardsley, Doug A. Edwards:
A Burst-Mode Oriented Back-End for the Balsa Synthesis System. DATE 2002: 330-337 - 2000
- [j1]Andrew Bardsley, Doug A. Edwards:
Synthesising an asynchronous DMA controller with Balsa. J. Syst. Archit. 46(14): 1309-1319 (2000) - [c1]Jim D. Garside, W. J. Bainbridge, Andrew Bardsley, David M. Clark, David A. Edwards, Stephen B. Furber, David W. Lloyd, Siamak Mohammadi, J. S. Pepper, Steve Temple, John V. Woods, Jianwei Liu, O. Petli:
AMULET3i - An Asynchronous System-on-Chip. ASYNC 2000: 162-175
Coauthor Index
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