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Vishnuvardhan V. Iyer
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2020 – today
- 2024
- [j1]Vishnuvardhan V. Iyer
, Aditya Thimmaiah
A Hierarchical Classification Method for High-accuracy Instruction Disassembly with Near-field EM Measurements. ACM Trans. Embed. Comput. Syst. 23(1): 10:1-10:21 (2024) - [c6]Sirish Oruganti, Meizhi Wang, Vishnuvardhan V. Iyer, Yipeng Wang, Mengtian Yang, Raghavan Kumar, Sanu K. Mathew, Jaydeep P. Kulkarni:
Power and EM Side-Channel-Attack-Resilient AES-128 Core with Round-Aligned Globally-Synchronous-Locally-Asynchronous Operation Based on Tunable Replica Circuits. ISSCC 2024: 308-310 - 2022
- [c5]Aditya Thimmaiah, Vishnuvardhan V. Iyer, Andreas Gerstlauer, Michael Orshansky:
High-Level Simulation of Embedded Software Vulnerabilities to EM Side-Channel Attacks. SAMOS 2022: 155-170 - 2021
- [c4]Meizhi Wang
Physical Design Strategies for Mitigating Fine-Grained Electromagnetic Side-Channel Attacks. CICC 2021: 1-2 - [c3]Meizhi Wang
Galvanically Isolated, Power and Electromagnetic Side-Channel Attack Resilient Secure AES Core with Integrated Charge Pump based Power Management. CICC 2021: 1-2 - [c2]Vishnuvardhan V. Iyer, Meizhi Wang
A Systematic Evaluation of EM and Power Side-Channel Analysis Attacks on AES Implementations. ISI 2021: 1-6
2010 – 2019
- 2019
- [c1]Ge Li, Vishnuvardhan V. Iyer, Michael Orshansky:
Securing AES against Localized EM Attacks through Spatial Randomization of Dataflow. HOST 2019: 191-197
Coauthor Index
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