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Toshitsugu Sakamoto
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2020 – today
- 2022
- [j9]Xu Bai, Ryusuke Nebashi, Makoto Miyamura, Kazunori Funahashi, Naoki Banno, Koichiro Okamoto, Hideaki Numata, Noriyuki Iguchi, Tadahiko Sugibayashi, Toshitsugu Sakamoto, Munehiro Tada
:
28nm Atom-Switch FPGA: Static Timing Analysis and Evaluation. IEICE Trans. Electron. 105-C(10): 627-630 (2022) - [j8]Xu Bai
Via-Switch FPGA: 65-nm CMOS Implementation and Evaluation. IEEE J. Solid State Circuits 57(7): 2250-2262 (2022) - [c13]Tomohisa Miyao, Takahisa Tanaka, Itsuki Imanishi, Masayuki Ichikawa, Shuya Nakagawa, Hiroki Ishikuro, Toshitsugu Sakamoto, Munehiro Tada
Enhanced Drain Current in Transient Mode due to Long Ionization Time of Shallow Impurities at 4 K in 65-nm bulk Cryo CMOS Transistors. DRC 2022: 1-2 - 2020
- [j7]Ryutaro Doi, Xu Bai, Toshitsugu Sakamoto, Masanori Hashimoto
A Fault Detection and Diagnosis Method for Via-Switch Crossbar in Non-Volatile FPGA. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 103-A(12): 1447-1455 (2020) - [c12]Ryutaro Doi, Xu Bai, Toshitsugu Sakamoto, Masanori Hashimoto
Fault Diagnosis of Via-Switch Crossbar in Non-volatile FPGA. DATE 2020: 983-986 - [c11]Ryusuke Nebashi, Naoki Banno, Makoto Miyamura, Xu Bai, Kazunori Funahashi, Koichiro Okamoto, Noriyuki Iguchi, Hideaki Numata, Tadahiko Sugibayashi, Toshitsugu Sakamoto, Munehiro Tada
A 171k-LUT Nonvolatile FPGA using Cu Atom-Switch Technology in 28nm CMOS. FPL 2020: 323-327 - [c10]Koichiro Okamoto, Ryusuke Nebashi, Naoki Banno, Xu Bai, Hideaki Numata, Noriyuki Iguchi, Makoto Miyamura, Hiromitsu Hada, Kazunori Funahashi, Tadahiko Sugibayashi, Toshitsugu Sakamoto, Munehiro Tada
ON-state retention of Atom Switch eNVM for IoT/AI Inference Solution. IRPS 2020: 1-4 - [c9]Masanori Hashimoto
33.3 Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for Al Applications. ISSCC 2020: 502-504
2010 – 2019
- 2018
- [j6]Hiroki Hihara
Sensor Signal Processing Using High-Level Synthesis With a Layered Architecture. IEEE Embed. Syst. Lett. 10(4): 119-122 (2018) - 2017
- [j5]Makoto Miyamura, Toshitsugu Sakamoto, Xu Bai, Yukihide Tsuji
NanoBridge-Based FPGA in High-Temperature Environments. IEEE Micro 37(5): 32-42 (2017) - 2016
- [c8]Yukihide Tsuji
A 2× logic density Programmable Logic array using atom switch fully implemented with logic transistors at 40nm-node and beyond. VLSI Circuits 2016: 1-2 - 2015
- [j4]Toshitsugu Sakamoto, Yukihide Tsuji
A Silicon-on-Thin-Buried-Oxide CMOS Microcontroller with Embedded Atom-Switch ROM. IEEE Micro 35(6): 13-23 (2015) - [c7]Toshitsugu Sakamoto, Yukihide Tsuji
0.39-V, 18.26-µW/MHz SOTB CMOS Microcontroller with embedded atom switch ROM. COOL Chips 2015: 1-3 - [c6]Makoto Miyamura, Toshitsugu Sakamoto, Yukihide Tsuji
0.5-V Highly Power-Efficient Programmable Logic using Nonvolatile Configuration Switch in BEOL. FPGA 2015: 236-239 - [c5]Xu Bai, Yukihide Tsuji, Ayuka Morioka, Makoto Miyamura, Toshi Sakamoto, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada:
Architecture of Reconfigurable-Logic Cell Array with Atom Switch: Cluster Size & Routing Fabrics (Abstract Only). FPGA 2015: 269 - [c4]Yukihide Tsuji
Sub-μW standby power, <18 μW/DMIPS@25MHz MCU with embedded atom-switch programmable logic and ROM. VLSIC 2015: 86- - 2014
- [c3]Makoto Miyamura, Toshitsugu Sakamoto, Munehiro Tada
Low-power programmable-logic cell arrays using nonvolatile complementary atom switch. ISQED 2014: 330-334 - 2011
- [c2]Makoto Miyamura, Shogo Nakaya, Munehiro Tada
Programmable cell array using rewritable solid-electrolyte switch integrated in 90nm CMOS. ISSCC 2011: 228-229 - 2010
- [j3]Hideaki Saito, Masayuki Nakajima, Takumi Okamoto, Yusuke Yamada, Akira Ohuchi, Noriyuki Iguchi, Toshitsugu Sakamoto, Koichi Yamaguchi, Masayuki Mizuno:
A Chip-Stacked Memory for On-Chip SRAM-Rich SoCs and Processors. IEEE J. Solid State Circuits 45(1): 15-22 (2010)
2000 – 2009
- 2009
- [c1]Hideaki Saito, Masayuki Nakajima, Takumi Okamoto, Yusuke Yamada, Akira Ohuchi, Noriyuki Iguchi, Toshitsugu Sakamoto, Koichi Yamaguchi, Masayuki Mizuno:
A chip-stacked memory for on-chip SRAM-rich SoCs and processors. ISSCC 2009: 60-61 - 2006
- [j2]Naoki Banno, Toshitsugu Sakamoto, Noriyuki Iguchi, Hisao Kawaura, Shunichi Kaeriyama, Masayuki Mizuno, Kazuya Terabe
Solid-Electrolyte Nanometer Switch. IEICE Trans. Electron. 89-C(11): 1492-1498 (2006) - 2005
- [j1]Shunichi Kaeriyama, Toshitsugu Sakamoto, Hiroshi Sunamura, Masayuki Mizuno, Hisao Kawaura, Tsuyoshi Hasegawa, Kazuya Terabe
A nonvolatile programmable solid-electrolyte nanometer switch. IEEE J. Solid State Circuits 40(1): 168-176 (2005)
Coauthor Index
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