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Joerg Hauptmann
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2010 – 2019
- 2010
- [c2]Enrique Prefasi
, Susana Patón
, Luis Hernández, Richard Gaggl
, Andreas Wiesbauer, Joerg Hauptmann:
A 0.08 mm2, 7mW Time-Encoding Oversampling Converter with 10 bits and 20MHz BW in 65nm CMOS. ESSCIRC 2010: 430-433
2000 – 2009
- 2004
- [j3]Peter Pessl, Richard Gaggl
, Johannes Hohl, Dario Giotta, Joerg Hauptmann:
A four-channel ADSL2+ analog front-end for CO applications with 75 mW per channel, built in 0.13-μm CMOS. IEEE J. Solid State Circuits 39(12): 2371-2378 (2004) - 2002
- [j2]Hubert Weinberger, Andreas Wiesbauer, Christian Fleischhacker, Joerg Hauptmann, Thomas Ferianz, Michael Staber, Dietmar Sträußnigg, Berthold Seger:
An ADSL-RT full-rate analog front end IC with integrated line driver. IEEE J. Solid State Circuits 37(7): 857-865 (2002) - 2001
- [c1]Hubert Weinberger, Andreas Wiesbauer, Christian Fleischhacker, Joerg Hauptmann:
A 800 mW, full-rate ADSL-RT analog frontend IC with integrated line driver. CICC 2001: 115-118
1990 – 1999
- 1994
- [j1]Michael Tiefenbacher, Peter Caldera, Franz Dielacher
, Joerg Hauptmann, Markus Steiner:
A four-channel CMOS codec filter circuit "SICOFI-4". IEEE J. Solid State Circuits 29(8): 906-913 (1994)
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last updated on 2024-10-07 22:08 CEST by the dblp team
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