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Shuo Huai
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2020 – today
- 2024
- [j13]Bingjie Tang
, Zhiyang Guo
A Fruit-Tree Mapping System for Semi-Structured Orchards Based on Multi-Sensor-Fusion SLAM. IEEE Access 12: 162122-162130 (2024) - [j12]Shuo Huai
EvoLP: Self-Evolving Latency Predictor for Model Compression in Real-Time Edge Systems. IEEE Embed. Syst. Lett. 16(2): 174-177 (2024) - [j11]Xiangzhong Luo
Domino-Pro-Max: Toward Efficient Network Simplification and Reparameterization for Embedded Hardware Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(12): 4532-4545 (2024) - [c15]Xiangzhong Luo, Di Liu, Hao Kong, Shuo Huai, Hui Chen, Shiqing Li, Guochu Xiong, Weichen Liu:
Pearls Hide Behind Linearity: Simplifying Deep Convolutional Networks for Embedded Hardware Systems via Linearity Grafting. ASPDAC 2024: 250-255 - [c14]Xiangzhong Luo
Double-Win NAS: Towards Deep-to-Shallow Transformable Neural Architecture Search for Intelligent Embedded Systems. DAC 2024: 128:1-128:6 - [c13]Vikash Sathiamoorthy
FedTR: Federated Learning Framework with Transfer Learning for Industrial Visual Inspection. ACM Great Lakes Symposium on VLSI 2024: 310-314 - [i3]Xiangzhong Luo, Di Liu, Hao Kong, Shuo Huai, Hui Chen, Guochu Xiong, Weichen Liu:
Efficient Deep Learning Infrastructures for Embedded Computing Systems: A Comprehensive Survey and Future Envision. CoRR abs/2411.01431 (2024) - 2023
- [j10]Shuo Huai
On Hardware-Aware Design and Optimization of Edge Intelligence. IEEE Des. Test 40(6): 149-162 (2023) - [j9]Shuo Huai
Latency-constrained DNN architecture learning for edge systems using zerorized batch normalization. Future Gener. Comput. Syst. 142: 314-327 (2023) - [j8]Xiangzhong Luo
SurgeNAS: A Comprehensive Surgery on Hardware-Aware Differentiable Neural Architecture Search. IEEE Trans. Computers 72(4): 1081-1094 (2023) - [j7]Xiangzhong Luo
LightNAS: On Lightweight and Scalable Neural Architecture Search for Embedded Platforms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(6): 1784-1797 (2023) - [j6]Hao Kong
EdgeCompress: Coupling Multidimensional Model Compression and Dynamic Inference for EdgeAI. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4657-4670 (2023) - [j5]Shiqing Li
An Efficient Gustavson-Based Sparse Matrix-Matrix Multiplication Accelerator on Embedded FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4671-4680 (2023) - [j4]Shuo Huai
CRIMP: Compact & Reliable DNN Inference on In-Memory Processing via Crossbar-Aligned Compression and Non-ideality Adaptation. ACM Trans. Embed. Comput. Syst. 22(5s): 123:1-123:25 (2023) - [c12]Shuo Huai
Crossbar-Aligned & Integer-Only Neural Network Compression for Efficient in-Memory Acceleration. ASP-DAC 2023: 234-239 - [c11]Hui Chen, Di Liu, Shiqing Li, Shuo Huai
MUGNoC: A Software-Configured Multicast-Unicast-Gather NoC for Accelerating CNN Dataflows. ASP-DAC 2023: 308-313 - [c10]Hao Kong, Di Liu, Xiangzhong Luo, Shuo Huai, Ravi Subramaniam, Christian Makaya, Qian Lin, Weichen Liu:
Towards Efficient Convolutional Neural Network for Embedded Hardware via Multi-Dimensional Pruning. DAC 2023: 1-6 - [c9]Hao Kong, Xiangzhong Luo, Shuo Huai, Di Liu, Ravi Subramaniam, Christian Makaya, Qian Lin, Weichen Liu:
EMNAPE: Efficient Multi-Dimensional Neural Architecture Pruning for EdgeAI. DATE 2023: 1-2 - [c8]Shien Zhu
iMAT: Energy-Efficient In-Memory Acceleration for Ternary Neural Networks With Sparse Dot Product. ISLPED 2023: 1-6 - 2022
- [j3]Hao Kong
EDLAB: A Benchmark for Edge Deep Learning Accelerators. IEEE Des. Test 39(3): 8-17 (2022) - [j2]Xiangzhong Luo
Designing Efficient DNNs via Hardware-Aware Neural Architecture Search and Beyond. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(6): 1799-1812 (2022) - [j1]Hui Chen
LAMP: Load-Balanced Multipath Parallel Transmission in Point-to-Point NoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(12): 5232-5245 (2022) - [c7]Xiangzhong Luo, Di Liu, Hao Kong, Shuo Huai, Hui Chen, Weichen Liu:
Work-in-Progress: What to Expect of Early Training Statistics? An Investigation on Hardware-Aware Neural Architecture Search. CODES+ISSS 2022: 1-2 - [c6]Xiangzhong Luo, Di Liu, Hao Kong, Shuo Huai, Hui Chen, Weichen Liu:
You only search once: on lightweight differentiable architecture search for resource-constrained embedded platforms. DAC 2022: 475-480 - [c5]Hao Kong, Di Liu, Shuo Huai, Xiangzhong Luo, Weichen Liu, Ravi Subramaniam, Christian Makaya, Qian Lin:
Smart Scissor: Coupling Spatial Redundancy Reduction and CNN Compression for Embedded Hardware. ICCAD 2022: 109:1-109:9 - [c4]Shuo Huai
Collate: Collaborative Neural Network Learning for Latency-Critical Edge Systems. ICCD 2022: 627-634 - [i2]Xiangzhong Luo, Di Liu, Hao Kong, Shuo Huai, Hui Chen, Weichen Liu:
You Only Search Once: On Lightweight Differentiable Architecture Search for Resource-Constrained Embedded Platforms. CoRR abs/2208.14446 (2022) - 2021
- [c3]Shuo Huai
ZeroBN: Learning Compact Neural Networks For Latency-Critical Edge Systems. DAC 2021: 151-156 - [c2]Xiangzhong Luo, Di Liu, Shuo Huai
HSCoNAS: Hardware-Software Co-Design of Efficient DNNs via Neural Architecture Search. DATE 2021: 418-421 - [i1]Xiangzhong Luo, Di Liu, Shuo Huai, Weichen Liu:
HSCoNAS: Hardware-Software Co-Design of Efficient DNNs via Neural Architecture Search. CoRR abs/2103.08325 (2021)
2010 – 2019
- 2019
- [c1]Shuo Huai
Performance-aware Wear Leveling for Block RAM in Nonvolatile FPGAs. DAC 2019: 157
Coauthor Index
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