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Ashbir Aviat Fadila
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- affiliation: Tokyo Institute of Technology, Japan
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2020 – today
- 2024
- [j9]Xi Fu
, Dongwon You, Yun Wang
A Low-Power Radiation-Hardened Ka-Band CMOS Phased-Array Receiver for Small Satellite Constellation. IEEE J. Solid State Circuits 59(2): 349-363 (2024) - [j8]Yuncheng Zhang
A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Hybrid FIR Filter. IEEE J. Solid State Circuits 59(4): 993-1005 (2024) - [c15]Teruo Jyo, Ibrahim Abdo, Hiroshi Hamada, Munehiko Nagatani, Adam Pander, Hitoshi Wakita, Miwa Mutoh, Yuta Shiratori, Daisuke Kitayama, Carrel da Gomez, Chun Wang, Kota Hatano, Chenxin Liu, Ashbir Aviat Fadila, Jian Pang, Atsushi Shirane, Kenichi Okada, Hiroyuki Takahashi:
300-GHz-Band InP HBT Power Amplifier and InP-CMOS Hybrid Phased-Array Transmitter. BCICTS 2024: 166-172 - [c14]Dingxin Xu, Zezheng Liu, Yifeng Kuai, Hongye Huang, Yuncheng Zhang, Zheng Sun, Bangan Liu, Wenqian Wang, Yuang Xiong, Junjun Qiu, Waleed Madany, Yi Zhang, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada:
10.3 A 7GHz Digital PLL with Cascaded Fractional Divider and Pseudo-Differential DTC Achieving -62.1dBc Fractional Spur and 143.7fs Integrated Jitter. ISSCC 2024: 192-194 - 2023
- [j7]Xi Fu
A Low-Power 256-Element Ka-Band CMOS Phased-Array Receiver With On-Chip Distributed Radiation Sensors for Small Satellite Constellations. IEEE J. Solid State Circuits 58(12): 3380-3395 (2023) - [c13]Dingxin Xu, Yuncheng Zhang, Hongye Huang
A 6.5-to-8GHz Cascaded Dual-Fractional-N Digital PLL Achieving -63.7dBc Fractional Spurs with 50MHz Reference. CICC 2023: 1-2 - [c12]Waleed Madany
A Fully Synthesizable DPLL with Background Gain Mismatch Calibrated Feedforward Phase Noise Cancellation Path. ESSCIRC 2023: 265-268 - [c11]Junjun Qiu, Wenqian Wang, Zheng Sun, Bangan Liu, Yuncheng Zhang, Dingxin Xu, Hongye Huang
A 32kHz-Reference 2.4GHz Fractional-N Nonuniform Oversampling PLL with Gain-Boosted PD and Loop-Gain Calibration. ISSCC 2023: 80-81 - [c10]Xi Fu
A 2.95mW/element Ka-band CMOS Phased-Array Receiver Utilizing On-Chip Distributed Radiation Sensors in Low-Earth-Orbit Small Satellite Constellation. ISSCC 2023: 296-297 - [c9]Dongwon You, Xi Fu
A Small-Satellite-Mounted 256-Element Ka-Band CMOS Phased-Array Transmitter Achieving 63.8dBm EIRP Under 26.6W Power Consumption Using Single/Dual Circular Polarization Active Coupler. ISSCC 2023: 298-299 - [c8]Yuncheng Zhang, Zheng Sun, Bangan Liu, Junjun Qiu, Dingxin Xu, Yi Zhang, Xi Fu
A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Transformer Combined FIR FIlter. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j6]Yun Wang
A Ka-Band SATCOM Transceiver in 65-nm CMOS With High-Linearity TX and Dual-Channel Wide-Dynamic-Range RX for Terrestrial Terminal. IEEE J. Solid State Circuits 57(2): 356-370 (2022) - [j5]Ibrahim Abdo
A Bi-Directional 300-GHz-Band Phased-Array Transceiver in 65-nm CMOS With Outphasing Transmitting Mode and LO Emission Cancellation. IEEE J. Solid State Circuits 57(8): 2292-2308 (2022) - [j4]Yi Zhang
A Power-Efficient CMOS Multi-Band Phased-Array Receiver Covering 24-71-GHz Utilizing Harmonic-Selection Technique With 36-dB Inter-Band Blocker Tolerance for 5G NR. IEEE J. Solid State Circuits 57(12): 3617-3630 (2022) - [c7]Xi Fu
A 3.4mW/element Radiation-Hardened Ka-Band CMOS Phased-Array Receiver Utilizing Magnetic-Tuning Phase Shifter for Small Satellite Constellation. ISSCC 2022: 90-92 - [c6]Jian Pang, Yi Zhang
A Power-Efficient 24-to-71 GHz CMOS Phased-Array Receiver Utilizing Harmonic-Selection Technique Supporting 36dB Inter-Band Blocker Rejection for 5G NR. ISSCC 2022: 434-436 - [c5]Michihiro Ide, Yuasa Keito, Sena Kato, Dongwon You
A 28-GHz Fully-Passive Retro-Reflective Phased-Array Backscattering Transceiver for 5G Network with 24-GHz Beam-Steered Wireless Power Transfer. VLSI Technology and Circuits 2022: 96-97 - 2021
- [j3]Jian Pang
A CMOS Dual-Polarized Phased-Array Beamformer Utilizing Cross-Polarization Leakage Cancellation for 5G MIMO Systems. IEEE J. Solid State Circuits 56(4): 1310-1326 (2021) - [c4]Ibrahim Abdo
22.2 A 300GHz-Band Phased-Array Transceiver Using Bi-Directional Outphasing and Hartley Architecture in 65nm CMOS. ISSCC 2021: 316-318 - 2020
- [j2]Yun Wang
A 39-GHz 64-Element Phased-Array Transceiver With Built-In Phase and Amplitude Calibrations for Large-Array 5G NR in 65-nm CMOS. IEEE J. Solid State Circuits 55(5): 1249-1269 (2020) - [j1]Jian Pang
A 28-GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR. IEEE J. Solid State Circuits 55(9): 2371-2386 (2020) - [c3]Zheng Li, Jian Pang, Ryo Kubozoe, Xueting Luo, Rui Wu, Yun Wang, Dongwon You
A 28GHz CMOS Differential Bi-Directional Amplifier for 5G NR. ASP-DAC 2020: 5-6 - [c2]Jian Pang, Zheng Li, Xueting Luo, Joshua Alvin, Rattanan Saengchan, Ashbir Aviat Fadila, Kiyoshi Yanagisawa, Yi Zhang
A 28-GHz CMOS Phased-Array Beamformer Supporting Dual-Polarized MIMO with Cross-Polarization Leakage Cancellation. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [c1]Jian Pang, Zheng Li, Ryo Kubozoe, Xueting Luo, Rui Wu, Yun Wang, Dongwon You
A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR. ISSCC 2019: 344-346
Coauthor Index
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