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Darrin M. Hanna
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2020 – today
- 2024
- [j12]Azam Tayyebi, Darrin M. Hanna
, Bryant Jones:
Parametrized low-complexity hardware architecture of an H.264-based video encoder for FPGAs. Microprocess. Microsystems 105: 105017 (2024) - [c22]Michael Muller, Alexander Tyshka, Max Theisen, Darrin M. Hanna:
Co-design of a TinyLLM using Programmable Logic and Software on an FPGA. MWSCAS 2024: 253-257
2010 – 2019
- 2019
- [j11]Bryant Jones, Darrin M. Hanna
Automatic cache partitioning method for high-level synthesis. Microprocess. Microsystems 67: 71-81 (2019) - [j10]Jason Gorski, Darrin M. Hanna
The FPOA, a Medium-grained Reconfigurable Architecture for High-level Synthesis. ACM Trans. Reconfigurable Technol. Syst. 12(4): 18:1-18:31 (2019) - 2017
- [c21]Jason Gorski, Darrin M. Hanna
A medium-grained reconfigurable architecture targeting high-level synthesis implementation. MWSCAS 2017: 349-352 - 2013
- [j9]David L. Foster, Darrin M. Hanna
Applying partial fault tolerance with explicit area constraints. Int. J. Embed. Syst. 5(1/2): 67-80 (2013) - [j8]David L. Foster, Darrin M. Hanna
Maximising area-constrained partial fault tolerance in reconfigurable logic using selection criteria. Int. J. Embed. Syst. 5(1/2): 81-94 (2013) - [c20]Darrin M. Hanna
An embedded Forth core with floating point and branch prediction. MWSCAS 2013: 1055-1058 - 2012
- [j7]Girma S. Tewolde
A modular and efficient hardware architecture for particle swarm optimization algorithm. Microprocess. Microsystems 36(4): 289-302 (2012) - 2010
- [j6]Brooks A. Gross, Darrin M. Hanna
Artificial neural networks capable of learning spatiotemporal chemical diffusion in the cortical brain. Pattern Recognit. 43(11): 3910-3921 (2010) - [c19]Darrin M. Hanna, Richard E. Haskell:
FPGA-based Hybrid Systems in Forth: a Forth Core and Reconfigurable Hardware from Forth. ESA 2010: 168-171 - [c18]David Foster, Darrin M. Hanna:
Implementing Error Detection and Error Correction with Explicit Area Constraints. ERSA 2010: 275-280 - [c17]David L. Foster, Darrin M. Hanna
Maximizing area-constrained partial fault tolerance in reconfigurable logic. FPGA 2010: 259-262
2000 – 2009
- 2009
- [c16]Girma S. Tewolde
Accelerating the performance of particle swarm optimization for embedded applications. IEEE Congress on Evolutionary Computation 2009: 2294-2300 - [c15]Girma S. Tewolde
Multi-swarm parallel PSO: Hardware implementation. SIS 2009: 60-66 - [c14]Girma S. Tewolde
Enhancing performance of PSO with automatic parameter tuning technique. SIS 2009: 67-73 - 2008
- [c13]Girma S. Tewolde
Hardware PSO for sensor network applications. SIS 2008: 1-8 - 2007
- [j5]Darrin M. Hanna
Executing large algorithms on low-capacity FPGAs using flowpath partitioning and runtime reconfiguration. Microprocess. Microsystems 31(5): 302-312 (2007) - [j4]Barbara A. Oakley, Darrin M. Hanna
Best Practices Involving Teamwork in the Classroom: Results From a Survey of 6435 Engineering Student Respondents. IEEE Trans. Educ. 50(3): 266-272 (2007) - [c12]Darrin M. Hanna, Michael DuChene, Lawrence Kennedy, Brian Carpenter:
A Compiler to Generate Hardware from Java Byte Codes for High Performance, Low Energy Embedded Systems. ERSA 2007: 92-98 - [c11]Girma S. Tewolde, Darrin M. Hanna:
Particle Swarm Optimization for Cluster-Based Classification of Breast Cancer Data. GEM 2007: 172-176 - [c10]Darrin M. Hanna
Speedup using Flowpaths for a Finite Difference Solution of a 3D Parabolic PDE. IPDPS 2007: 1-6 - 2006
- [j3]Darrin M. Hanna
Flowpaths: Compiling stack-based IR to hardware. Microprocess. Microsystems 30(3): 125-136 (2006) - [c9]Darrin M. Hanna, Michael DuChene, Girma S. Tewolde, Jay Sattler:
Java Flowpaths: Efficiently Generating Circuits for Embedded Systems from Java. ESA 2006: 23-30 - [c8]Barbara A. Oakley, Brooks A. Gross, Sara G. Martens, Darrin M. Hanna
Electroporation-Induced Cell Lysis in SWLA-2 Hybridomas. EMBC 2006: 3495-3496 - [c7]Richard E. Haskell, Darrin M. Hanna, Kevin Van Sickle:
3D Signature Biometrics Using Curvature Moments. IC-AI 2006: 718-721 - 2004
- [j2]Richard E. Haskell, Darrin M. Hanna
A VHDL--Forth Core for FPGAs. Microprocess. Microsystems 28(3): 115-125 (2004) - [j1]Richard E. Haskell, Charles Lee, Darrin M. Hanna
Geno-fuzzy classification trees. Pattern Recognit. 37(8): 1653-1659 (2004) - [c6]Darrin M. Hanna, Richard E. Haskell:
Implementing Software Programs in FPGAs Using Flowpaths. ESA/VLSI 2004: 76-82 - [c5]Charles Lee, Darrin M. Hanna, Richard E. Haskell, Richard L. Alena:
Using Fuzzy Clustering for Real-time Space Flight Safety. IC-AI 2004: 619-626 - 2003
- [c4]Richard E. Haskell, Darrin M. Hanna:
Rapid Prototyping Using a Microprocessor Core on a Spartan II FPGA. Embedded Systems and Applications 2003: 49-55 - [c3]Darrin M. Hanna, Richard E. Haskell:
Using Flowpaths for the High-Level Synthesis of Reconfigurable Systems. Engineering of Reconfigurable Systems and Algorithms 2003: 273-279 - [c2]Ping Li, Richard E. Haskell, Darrin M. Hanna:
Optimizing Fuzzy Decision Trees Using Genetic Algorithms. IC-AI 2003: 469-474 - 2001
- [c1]Richard E. Haskell, Darrin M. Hanna
FPGA Integrated Co-Design. MSE 2001: 30-31
Coauthor Index
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