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2020 – today
- 2024
- [c79]Jinhai Hu
, Zhongyi Zhang
Late Breaking Results: Circuit-Algorithm Co-design for Learnable Audio Analog Front-End. DAC 2024: 347:1-347:2 - [c78]Yi Sheng Chong, Hongyu Cao, Wang Ling Goh, Patrick Bore, Yuanzheng Paul Tan
Quantum Readout Processing Accelerator with a CORDIC Core at Cryogenic Temperature. ISCAS 2024: 1-5 - [c77]Jiaju Lu, Siqi Zhang, Wang Ling Goh, Yuan Gao:
A 99.8-dB SNDR 10kHz-BW Second-Order DT Delta-Sigma Modulator with Single OTA and Enhanced Noise-Coupling. ISCAS 2024: 1-5 - [c76]Wei Soon Ng, Wang Ling Goh, Yuan Gao:
High Accuracy and Low Latency Mixed Precision Neural Network Acceleration for TinyML Applications on Resource-Constrained FPGAs. ISCAS 2024: 1-5 - [c75]Zhangyi Pei, Vishnu P. Nambiar, Yi Sheng Chong, Wang Ling Goh, Anh Tuan Do:
3881 Gbps/W, 3005 µm AES Core with State Based Clock Gating for IoT applications. ISCAS 2024: 1-5 - [c74]Shuailin Tao, Jinhai Hu, Wang Ling Goh, Yuan Gao:
Squeeze-Excite Fusion Based Multimodal Neural Network for Sleep Stage Classification with Flexible EEG/ECG Signal Acquisition Circuit. ISCAS 2024: 1-5 - [c73]Zhongyi Zhang, Wang Ling Goh, Yuan Gao:
A Nanowatt Area-Efficient 16-Channel Bandpass Filterbank with Floating Active Capacitance Multiplier for Acoustic Signal Processing. ISCAS 2024: 1-5 - 2023
- [c72]Tiancheng Cao, Zhongyi Zhang, Wang Ling Goh, Chen Liu, Yao Zhu, Yuan Gao:
A Ternary Weight Mapping and Charge-mode Readout Scheme for Energy Efficient FeRAM Crossbar Compute-in-Memory System. AICAS 2023: 1-5 - [c71]Jinhai Hu
Energy Efficient Software-hardware Co-design of Quantized Recurrent Convolutional Neural Network for Continuous Cardiac Monitoring. AICAS 2023: 1-5 - [c70]Shuailin Tao, Wang Ling Goh, Yuan Gao:
A Convolved Self-Attention Model for IMU-based Gait Detection and Human Activity Recognition. AICAS 2023: 1-5 - [c69]Qibang Zang, Wang Ling Goh, Yi Sheng Chong, Anh Tuan Do:
4b/4b/8b Precision Charge-Domain 8T-SRAM Based CiM for CNN Processing. AICAS 2023: 1-5 - [c68]Tiancheng Cao, Zhongyi Zhang, Wang Ling Goh, Chen Liu, Yao Zhu, Yuan Gao:
ECG Classification using Binary CNN on RRAM Crossbar with Nonidealities-Aware Training, Readout Compensation and CWT Preprocessing. BioCAS 2023: 1-5 - [c67]Jinhai Hu
Supervised Contrastive Pretrained ResNet with MixUp to Enhance Respiratory Sound Classification on Imbalanced and Limited Dataset. BioCAS 2023: 1-5 - [c66]Ziming Liu, Wang Ling Goh, Liter Siek
A Battery-input Hysteretic Buck Converter with 430nA Quiescent Current and 5×104 Load Current Dynamic Range for Wearable Biomedical Devices. BioCAS 2023: 1-5 - [c65]Tiancheng Cao, Weihao Yu
RRAM-PoolFormer: A Resistive Memristor-based PoolFormer Modeling and Training Framework for Edge-AI Applications. ISCAS 2023: 1-5 - [c64]Jinhai Hu
Classification of ECG Anomaly with Dynamically-biased LSTM for Continuous Cardiac Monitoring. ISCAS 2023: 1-5 - [c63]Cong Sheng Leow, Wang Ling Goh, Yuan Gao:
Sparsity Through Spiking Convolutional Neural Network for Audio Classification at the Edge. ISCAS 2023: 1-4 - [c62]Chen Shen, Junran Pu, Yi Sheng Chong, Zhongyi Zhang, Wang Ling Goh, Bin Zhao, Anh Tuan Do, Yuan Gao:
A 110nW Always-on Keyword Spotting Chip using Spiking CNN in 40nm CMOS. ISCAS 2023: 1-5 - [c61]Qibang Zang, Wang Ling Goh, Lu Lu, Chengshuo Yu, Junjie Mu, Tony Tae-Hyoung Kim, Bongjin Kim, Dongrui Li, Anh Tuan Do:
282-to-607 TOPS/W, 7T-SRAM Based CiM with Reconfigurable Column SAR ADC for Neural Network Processing. ISCAS 2023: 1-5 - [c60]Zhongyi Zhang, Tantan Zhang, Chen Shen, Wang Ling Goh, Yuan Gao:
A Nanowatt Temperature-Independent Tunable Active Capacitance Multiplier with DC Compensation in $0.13-\mu\mathrm{m}$ CMOS. ISCAS 2023: 1-5 - 2022
- [j31]Tiancheng Cao
Parasitic-Aware Modeling and Neural Network Training Scheme for Energy-Efficient Processing-in-Memory With Resistive Crossbar Array. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(2): 436-444 (2022) - [j30]Tiancheng Cao
A Non-Idealities Aware Software-Hardware Co-Design Framework for Edge-AI Deep Neural Network Implemented on Memristive Crossbar. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(4): 934-943 (2022) - [j29]Yi Sheng Chong
A 2.5 μW KWS Engine With Pruned LSTM and Embedded MFCC for IoT Applications. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 1662-1666 (2022) - [c59]Yi Sheng Chong, Wang Ling Goh, Yew Soon Ong, Vishnu P. Nambiar, Anh Tuan Do:
0.08mm2 128nW MFCC Engine for Ultra-low Power, Always-on Smart Sensing Applications. ISCAS 2022: 2680-2684 - [c58]Yi Sheng Chong, Wang Ling Goh, Yew Soon Ong, Vishnu P. Nambiar, Anh Tuan Do:
Recovering Accuracy of RRAM-based CIM for Binarized Neural Network via Chip-in-the-loop Training. ISCAS 2022: 2958-2962 - [c57]Qibang Zang, Wang Ling Goh, Fei Li, Lu Lu, Anh Tuan Do:
Temperature Compensation on SRAM-Based Computation in Memory Array. ISOCC 2022: 1-2 - [c56]Yingfeng Wang, Yi Sheng Chong, Wang Ling Goh, Anh Tuan Do:
Noise-Aware and Lightweight LSTM for Keyword Spotting Applications. ISOCC 2022: 135-136 - 2021
- [j28]Junran Pu
A 5.28-mm² 4.5-pJ/SOP Energy-Efficient Spiking Neural Network Hardware With Reconfigurable High Processing Speed Neuron Core and Congestion-Aware Router. IEEE Trans. Circuits Syst. I Regul. Pap. 68(12): 5081-5094 (2021) - [j27]Junran Pu
A Low Power and Low Area Router With Congestion-Aware Routing Algorithm for Spiking Neural Network Hardware Implementations. IEEE Trans. Circuits Syst. II Express Briefs 68(1): 471-475 (2021) - [j26]Junran Pu
A Low-Cost High-Throughput Digital Design of Biorealistic Spiking Neuron. IEEE Trans. Circuits Syst. II Express Briefs 68(4): 1398-1402 (2021) - [j25]Vishnu P. Nambiar
Energy Efficient 0.5V 4.8pJ/SOP 0.93μW Leakage/Core Neuromorphic Processor Design. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3148-3152 (2021) - [c55]Jinhai Hu
Dynamically-biased Fixed-point LSTM for Time Series Processing in AIoT Edge Device. AICAS 2021: 1-4 - [c54]Xuyang Huang, Ming Ming Wong, Anh Tuan Do, Wang Ling Goh:
A Backpropagation Extreme Learning Machine Approach to Fast Training Neural Network-Based Side-Channel Attack. AsianHOST 2021: 1-6 - [c53]Yi Sheng Chong, Wang Ling Goh, Yew Soon Ong, Vishnu P. Nambiar, Anh Tuan Do:
An Energy-Efficient Convolution Unit for Depthwise Separable Convolutional Neural Networks. ISCAS 2021: 1-5 - [c52]Tiancheng Cao, Chen Liu, Yuan Gao, Wang Ling Goh:
Parasitic-Aware Modelling for Neural Networks Implemented with Memristor Crossbar Array. MCSoC 2021: 122-126 - [c51]Zhaoyang Cao, Tan-Tan Zhang, Yuan Gao, Wang Ling Goh:
Design of Fully Differential Energy-Efficient Inverter-Based Low-Noise Amplifier for Ultrasound Imaging. VLSI-SoC 2021: 1-6 - [c50]Yi Sheng Chong, Wang Ling Goh, Yew Soon Ong, Vishnu P. Nambiar, Anh Tuan Do:
Efficient Implementation of Activation Functions for LSTM accelerators. VLSI-SoC 2021: 1-5 - 2020
- [j24]Zichuan Liu, Guosheng Lin
Bottom-Up Scene Text Detection with Markov Clustering Networks. Int. J. Comput. Vis. 128(6): 1786-1809 (2020) - [j23]Tao Tang
An Integrated Multi-Channel Biopotential Recording Analog Front-End IC With Area-Efficient Driven-Right-Leg Circuit. IEEE Trans. Biomed. Circuits Syst. 14(2): 297-304 (2020) - [j22]Tao Tang
A TDM-Based 16-Channel AFE ASIC With Enhanced System-Level CMRR for Wearable EEG Recording With Dry Electrodes. IEEE Trans. Biomed. Circuits Syst. 14(3): 516-524 (2020) - [j21]Wei Zhou
A 3-MHz 17.3- $\mu$ W 0.015% Period Jitter Relaxation Oscillator With Energy Efficient Swing Boosting. IEEE Trans. Circuits Syst. II Express Briefs 67-II(10): 1745-1749 (2020) - [c49]Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Tao Luo
0.5V 4.8 pJ/SOP 0.93µW Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron. A-SSCC 2020: 1-4 - [c48]Vishnu P. Nambiar, Eng-Kiat Koh, Junran Pu, Aarthy Mani, Ming Ming Wong, Li Fei, Wang Ling Goh, Anh Tuan Do:
Scalable Block-Based Spiking Neural Network Hardware with a Multiplierless Neuron Model. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j20]Yixing Li
A 34-FPS 698-GOP/s/W Binarized Deep Neural Network-Based Natural Scene Text Interpretation Accelerator for Mobile Edge Computing. IEEE Trans. Ind. Electron. 66(9): 7407-7416 (2019) - [c47]Yin Rui, Nicholas Heng-Loong Wong, Huaqun Guo, Wang Ling Goh:
Data-Driven Attack Anomaly Detection in Public Transport Networks. APWCS 2019: 1-5 - [c46]Zichuan Liu, Guosheng Lin
Towards Robust Curve Text Detection With Conditional Spatial Expansion. CVPR 2019: 7269-7278 - [c45]Junran Pu, Vishnu P. Nambiar, Anh-Tuan Do, Wang Ling Goh:
Block-Based Spiking Neural Network Hardware with Deme Genetic Algorithm. ISCAS 2019: 1-5 - [c44]Wei Zhou, Wang Ling Goh, Yuan Gao
A 1.6MHz Swing-Boosted Relaxation Oscillator with ±0.15%/V 23.4ppm/°C Frequency Inaccuracy using Voltage-to-Delay Feedback. ISCAS 2019: 1-4 - [c43]Junran Pu, Vishnu P. Nambiar, Aarthy Mani, Wang Ling Goh, Anh-Tuan Do:
Ower and Area Efficient Router with Automated Clock Gating for Neuromorphic Computing. SoCC 2019: 27-32 - [c42]Yun Kwan Lee, Vishnu P. Nambiar, Junran Pu, Wang Ling Goh, Anh-Tuan Do:
Coverage Driven Verification Methodology for Asynchronous Neuromorphic Routers. SoCC 2019: 242-247 - [c41]Wei Zhou, Wang Ling Goh, Yi Chen, Tantan Zhang
A 100-mVpp Input Range 10-kHz BW VCO-based CT-DSM Neuro-Recording IC in 40-nm CMOS. SoCC 2019: 466-470 - [i3]Zichuan Liu, Guosheng Lin, Sheng Yang, Fayao Liu, Weisi Lin, Wang Ling Goh:
Towards Robust Curve Text Detection with Conditional Spatial Expansion. CoRR abs/1903.08836 (2019) - 2018
- [j19]Yongkui Yang
A 10-Bit 300 kS/s Reference-Voltage Regulator Free SAR ADC for Wireless-Powered Implantable Medical Devices. Sensors 18(7): 2131 (2018) - [c40]Wang Ling Goh, Nicholas Sadjoli
Feasibility of dictionary-based sparse coding for data compression in machine condition-based monitoring. ICIS 2018: 234-239 - [c39]Zichuan Liu, Yixing Li, Fengbo Ren, Wang Ling Goh, Hao Yu:
SqueezedText: A Real-Time Scene Text Recognition by Binary Convolutional Encoder-Decoder Network. AAAI 2018: 7194-7201 - [c38]Zichuan Liu, Guosheng Lin
Learning Markov Clustering Networks for Scene Text Detection. CVPR 2018: 6936-6944 - [c37]Arish Shareef, Wang Ling Goh, Srikanth Narasimalu
A Rectifier-less Energy Harvesting Interface Circuit for Low-Voltage Piezoelectric Transducers. ISCAS 2018: 1-5 - [c36]Wei Zhou, Wang Ling Goh, Jia Hao Cheong, Yuan Gao
A 16.6 μW 3.12 MHz RC Relaxation Oscillator with 160.3 dBc/Hz FOM. ISCAS 2018: 1-5 - [c35]Elvira Febiani, Huaqun Guo, Wang Ling Goh:
An Advanced Firewall Rule Matching Algorithm. SOLI 2018: 49-54 - [c34]Marcellinus Hendro Adi Wibowo, Huaqun Guo, Wang Ling Goh:
Detecting anomalies in metro systems. WF-IoT 2018: 302-307 - [i2]Zichuan Liu, Guosheng Lin, Sheng Yang, Jiashi Feng, Weisi Lin, Wang Ling Goh:
Learning Markov Clustering Networks for Scene Text Detection. CoRR abs/1805.08365 (2018) - [i1]Zichuan Liu, Guosheng Lin, Wang Ling Goh, Fayao Liu, Chunhua Shen, Xiaokang Yang:
Correlation Propagation Networks for Scene Text Detection. CoRR abs/1810.00304 (2018) - 2017
- [j18]Ming Wai Lau, Kai Ho Mak, Ka Nang Leung
Enhanced active-feedback frequency compensation with on-chip-capacitor reduction feature for amplifiers with large capacitive load. Int. J. Circuit Theory Appl. 45(12): 2119-2133 (2017) - [c33]Tao Tang, Wang Ling Goh, Lei Yao, Yuan Gao
A 16-channel TDM analog front-end with enhanced system CMRR for wearable dry EEG recording. A-SSCC 2017: 33-36 - [c32]Tao Tang, Wang Ling Goh, Lei Yao, Jia Hao Cheong, Yuan Gao
An integrated multichannel neural recording analog front-end ASIC with area-efficient driven right leg circuit. EMBC 2017: 217-220 - [c31]Yong Wang, Yan Hong, Wang Ling Goh, Kevin T. C. Chai, Xin Lou, Wen Bin Ye:
A passively compensated capacitive sensor readout with biased varactor temperature compensation and temperature coherent quantization. ISCAS 2017: 1-4 - [c30]Tao Tang, Wang Ling Goh, Lei Yao, Yuan Gao
A TDM-based multi-channel analog front-end for wearable dry EEG recording system. NEWCAS 2017: 297-300 - 2016
- [j17]Yongkui Yang, Jun Zhou, Xin Liu, Jia Hao Cheong, Wang Ling Goh:
A 151-nW Adaptive Delta-Sampling ADC for Ultra-Low Power Sensing Applications. IEEE Trans. Circuits Syst. II Express Briefs 63-II(7): 638-642 (2016) - [j16]Jiacheng Wang, Wang Ling Goh, Xin Liu, Jun Zhou:
A 12.77-MHz 31 ppm/°C On-Chip RC Relaxation Oscillator With Digital Compensation Technique. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(11): 1816-1824 (2016) - [j15]Marco Ho
A Two-Stage Large-Capacitive-Load Amplifier With Multiple Cross-Coupled Small-Gain Stages. IEEE Trans. Very Large Scale Integr. Syst. 24(7): 2580-2592 (2016) - [j14]Chundong Wu, Wang Ling Goh, Chiang Liang Kok
Asymmetrical Dead-Time Control Driver for Buck Regulator. IEEE Trans. Very Large Scale Integr. Syst. 24(12): 3543-3547 (2016) - [c29]Chundong Wu, Wang Ling Goh, Wei Mao, Lei Wang, Yat-Hei Lam, Alan Chang, Yong Lian
A self biased full range current sensor for buck regulator. APCCAS 2016: 87-90 - [c28]Sari Shafidah Binte Shafiee, Kheong Sann Chan, Wang Ling Goh:
Optimization of codes for the joint Viterbi detector decoder (JVDD). ICNC 2016: 1-5 - [c27]Jiacheng Wang, Wang Ling Goh:
A 13.5-MHz relaxation oscillator with ±0.5% temperature stability for RFID application. ISCAS 2016: 2431-2434 - [c26]Yan Hong, Yong Wang, Wang Ling Goh, Yuan Gao
Analysis of monolithic I/Q based impedance measurement circuits: Impact of non-ideal circuit effects on accuracies. ISIC 2016: 1-4 - [c25]Yihu Li, Wang Ling Goh, Hailin Tang, Haitao Liu, Xiaodong Deng, Yong-Zhong Xiong:
A 10 to 170 GHz distributed amplifier using 130-nm SiGe HBTs. ISIC 2016: 1-4 - [c24]Arish Shareef, Wang Ling Goh, Yuan Gao
Synchronous Electric Charge Extraction for low voltage Piezoelectric Energy Harvester array. ISIC 2016: 1-4 - [c23]Tao Tang, Wang Ling Goh, Xin Liu, Chao Wang:
A 0.18µm, 0.6V, 83.5µW integer DCT processor for neural signal applications. ISIC 2016: 1-4 - [c22]Jiacheng Wang, Wang Ling Goh:
A 12.4-kHz on-chip RC oscillator with comparator offset cancellation for PVT variation tolerance. ISIC 2016: 1-4 - [c21]Yong Wang, Yan Hong, Wang Ling Goh, Xiaojing Mu, Kevin T. C. Chai:
A modified PiBVD model for Lamb wave resonator. ISIC 2016: 1-4 - [c20]Chundong Wu, Wang Ling Goh, Yongkui Yang, Alan Chang, Xi Zhu, Lei Wang:
A start-up free 200nW bandgap voltage reference. NEWCAS 2016: 1-4 - [c19]Yan Hong, Yong Wang, Wang Ling Goh, Yuan Gao
A 9.84-73.2 nJ, 0.048 mm2 time-domain impedance sensor that provides values of resistance and capacitance. VLSI Circuits 2016: 1-2 - 2015
- [j13]Melissa Wan Jun Chua, Kui Cai, Wang Ling Goh:
Efficient Two-Write WOM-Codes for Non-Volatile Memories. IEEE Commun. Lett. 19(10): 1690-1693 (2015) - [j12]Kai Ho Mak, Ming Wai Lau, Jianping Guo, Tin Wai Mui, Marco Ho
A 0.7V 24µA Hybrid OTA Driving 15 nF Capacitive Load With 1.46 MHz GBW. IEEE J. Solid State Circuits 50(11): 2750-2757 (2015) - [j11]Xin Liu, Jun Zhou, Chao Wang, Kah-Hyong Chang, Jianwen Luo, Jingjing Lan, Lei Liao, Yat-Hei Lam, Yongkui Yang, Bo Wang
An Ultralow-Voltage Sensor Node Processor With Diverse Hardware Acceleration and Cognitive Sampling for Intelligent Sensing. IEEE Trans. Circuits Syst. II Express Briefs 62-II(12): 1149-1153 (2015) - [c18]Jiacheng Wang, Wang Ling Goh, Xin Liu, Jun Zhou:
A 12.77-MHz on-chip relaxation oscillator with digital compensation for loop delay variation. A-SSCC 2015: 1-4 - [c17]Chundong Wu, Wang Ling Goh, Chiang Liang Kok
A low TC, supply independent and process compensated current reference. CICC 2015: 1-4 - [c16]Yan Hong, Yong Wang, Wang Ling Goh, Yuan Gao
A current-excited triple-time-voltage oversampling method for bio-impedance model for cost-efficient circuit system. EMBC 2015: 1037-1040 - [c15]Yihu Li, Wang Ling Goh, Yong-Zhong Xiong:
A 124 to 132.5 GHz frequency quadrupler with 4.4 dBm output power in 0.13μm SiGe BiCMOS. ESSCIRC 2015: 132-135 - [c14]Kai Ho Mak, Marco Ho
Design considerations of STCB OTA in CMOS 65nm with large capacitive loads. ISCAS 2015: 2465-2468 - 2014
- [j10]Xin Liu, Jun Zhou, Yongkui Yang, Bo Wang
A 457 nW Near-Threshold Cognitive Multi-Functional ECG Processor for Long-Term Cardiac Monitoring. IEEE J. Solid State Circuits 49(11): 2422-2434 (2014) - [j9]Melvin Heng Li Lim, Wang Ling Goh:
High-Throughput Cognitive-Amplification Detector for LDPC Decoders. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(10): 2961-2969 (2014) - [c13]Seong-Jin Kim, Lei Liu, Lei Yao, Wang Ling Goh, Yuan Gao
A 0.5-V sub-μW/channel neural recording IC with delta-modulation-based spike detection. A-SSCC 2014: 189-192 - [c12]Hendika Fatkhi Nurhuda, Yongkui Yang, Wang Ling Goh:
A three-topology based, wide input range switched-capacitor DC-DC converter with low-ripple and enhanced load line regulations. ISIC 2014: 13-16 - 2013
- [j8]Stephen M. Cox
Intrinsic Distortion of a Fully Differential BD-Modulated Class-D Amplifier With Analog Feedback. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(1): 63-73 (2013) - [j7]Xiaodan Zou, Lei Liu, Jia Hao Cheong, Lei Yao, Peng Li, Ming-Yuan Cheng, Wang Ling Goh, Ramamoorthy Rajkumar, Gavin Stewart Dawe, Kuang-Wei Cheng, Minkyu Je:
A 100-Channel 1-mW Implantable Neural Recording IC. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(10): 2584-2596 (2013) - [c11]Melvin Heng Li Lim, Wang Ling Goh:
High-throughput dual-shift stochastic-detection quasi-cyclic LDPC decoder. ICICS 2013: 1-5 - [c10]Lei Liu, Lei Yao, Xiaodan Zou, Wang Ling Goh, Minkyu Je:
Neural recording front-end IC using action potential detection and analog buffer with digital delay for data compression. EMBC 2013: 747-750 - 2012
- [j6]Chang Liu, Yue-Peng Yan, Wang Ling Goh, Yong-Zhong Xiong, Li-Jun Zhang, Mohammad Madihian:
A 5-Gb/s Automatic Gain Control Amplifier With Temperature Compensation. IEEE J. Solid State Circuits 47(6): 1323-1333 (2012) - [j5]Jun Yu, Meng Tong Tan, Wang Ling Goh, Stephen M. Cox
A Dual-Feedforward Carrier-Modulated Second-Order Class-D Amplifier With Improved THD. IEEE Trans. Circuits Syst. II Express Briefs 59-II(1): 35-39 (2012) - [j4]Jun Yu, Wang Ling Goh, Muthukumaraswamy Annamalai Arasu, Minkyu Je:
A 60-V, >225°C Half-Bridge Driver for Piezoelectric Acoustic Transducer, on SOI CMOS. IEEE Trans. Circuits Syst. II Express Briefs 59-II(11): 771-775 (2012) - [c9]Melissa Wan Jun Chua, Kui Cai, Wang Ling Goh:
Two-write WOM-Codes for Non-Volatile Memories. ISPACS 2012: 710-715 - [c8]Melvin Heng Li Lim, Wang Ling Goh, Zhiliang Qin:
A novel FPGA implementation of mirror-paradigm RS-based QC-LDPC decoder for NVM channels. ISPACS 2012: 760-765 - [c7]Yong Wang
A 9% power efficiency 121-to-137GHz phase-controlled push-push frequency quadrupler in 0.13μm SiGe BiCMOS. ISSCC 2012: 262-264 - 2011
- [j3]Myint Wai Phyu, Kangkang Fu, Wang Ling Goh, Kiat Seng Yeo
Power-Efficient Explicit-Pulsed Dual-Edge Triggered Sense-Amplifier Flip-Flops. IEEE Trans. Very Large Scale Integr. Syst. 19(1): 1-9 (2011) - [c6]Xin Liu, Lei Wang, Mini Jayakrishnan, Jingjing Lan, Hongyu Li, Chong Ser Choong, M. Kumarasamy Raja, Yongxin Guo
A miniaturized heterogeneous wireless sensor node in 3DIC. 3DIC 2011: 1-4 - [c5]Ning Zhu, Wang Ling Goh, Kiat Seng Yeo:
Ultra low-power high-speed flexible Probabilistic Adder for Error-Tolerant Applications. ISOCC 2011: 393-396 - 2010
- [j2]Ning Zhu, Wang Ling Goh, Weija Zhang, Kiat Seng Yeo
Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing. IEEE Trans. Very Large Scale Integr. Syst. 18(8): 1225-1229 (2010)
2000 – 2009
- 2009
- [j1]Hai Qi Liu, Wang Ling Goh, Liter Siek
A Low-Noise Multi-GHz CMOS Multiloop Ring Oscillator With Coarse and Fine Frequency Tuning. IEEE Trans. Very Large Scale Integr. Syst. 17(4): 571-577 (2009) - 2008
- [c4]Liang-Yu Loy, Weija Zhang, Zhi-Hui Kong, Wang Ling Goh, Kiat Seng Yeo
Body-bootstrapped-buffer circuit for CMOS static power reduction. APCCAS 2008: 842-845 - 2005
- [c3]Hai Qi Liu, Wang Ling Goh, Liter Siek
A 0.18-µm 10-GHz CMOS ring oscillator for optical transceivers. ISCAS (2) 2005: 1525-1528 - [c2]Myint Wai Phyu, Wang Ling Goh, Kiat Seng Yeo
A low-power static dual edge-triggered flip-flop using an output-controlled discharge configuration. ISCAS (3) 2005: 2429-2432 - [c1]Hai Qi Liu, Wang Ling Goh, Liter Siek
1.8-V 10-GHZ ring VCO design using 0.18-μm CMOS technology. SoCC 2005: 77-78
Coauthor Index
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